target/s390x: Use atomic operations for COMPARE SWAP
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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1807aaa565
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303a9ab887
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@ -25,6 +25,7 @@ DEF_HELPER_3(cxgb, i64, env, s64, i32)
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DEF_HELPER_3(celgb, i64, env, i64, i32)
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DEF_HELPER_3(celgb, i64, env, i64, i32)
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DEF_HELPER_3(cdlgb, i64, env, i64, i32)
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DEF_HELPER_3(cdlgb, i64, env, i64, i32)
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DEF_HELPER_3(cxlgb, i64, env, i64, i32)
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DEF_HELPER_3(cxlgb, i64, env, i64, i32)
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DEF_HELPER_4(cdsg, void, env, i64, i32, i32)
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DEF_HELPER_FLAGS_3(aeb, TCG_CALL_NO_WG, i64, env, i64, i64)
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DEF_HELPER_FLAGS_3(aeb, TCG_CALL_NO_WG, i64, env, i64, i64)
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DEF_HELPER_FLAGS_3(adb, TCG_CALL_NO_WG, i64, env, i64, i64)
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DEF_HELPER_FLAGS_3(adb, TCG_CALL_NO_WG, i64, env, i64, i64)
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DEF_HELPER_FLAGS_5(axb, TCG_CALL_NO_WG, i64, env, i64, i64, i64, i64)
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DEF_HELPER_FLAGS_5(axb, TCG_CALL_NO_WG, i64, env, i64, i64, i64, i64)
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@ -239,12 +239,12 @@
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D(0xec7d, CLGIJ, RIE_c, GIE, r1_o, i2_8u, 0, 0, cj, 0, 1)
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D(0xec7d, CLGIJ, RIE_c, GIE, r1_o, i2_8u, 0, 0, cj, 0, 1)
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/* COMPARE AND SWAP */
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/* COMPARE AND SWAP */
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D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, 0)
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D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
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D(0xeb14, CSY, RSY_a, LD, r3_32u, r1_32u, new, r1_32, cs, 0, 0)
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D(0xeb14, CSY, RSY_a, LD, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
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D(0xeb30, CSG, RSY_a, Z, r3_o, r1_o, new, r1, cs, 0, 1)
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D(0xeb30, CSG, RSY_a, Z, r3_o, r1_o, new, r1, cs, 0, MO_TEQ)
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/* COMPARE DOUBLE AND SWAP */
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/* COMPARE DOUBLE AND SWAP */
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D(0xbb00, CDS, RS_a, Z, r3_D32, r1_D32, new, r1_D32, cs, 0, 1)
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D(0xbb00, CDS, RS_a, Z, r3_D32, r1_D32, new, r1_D32, cs, 0, MO_TEQ)
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D(0xeb31, CDSY, RSY_a, LD, r3_D32, r1_D32, new, r1_D32, cs, 0, 1)
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D(0xeb31, CDSY, RSY_a, LD, r3_D32, r1_D32, new, r1_D32, cs, 0, MO_TEQ)
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C(0xeb3e, CDSG, RSY_a, Z, 0, 0, 0, 0, cdsg, 0)
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C(0xeb3e, CDSG, RSY_a, Z, 0, 0, 0, 0, cdsg, 0)
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/* COMPARE AND TRAP */
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/* COMPARE AND TRAP */
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@ -23,6 +23,7 @@
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#include "exec/helper-proto.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "exec/cpu_ldst.h"
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#include "qemu/int128.h"
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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#include "hw/s390x/storage-keys.h"
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#include "hw/s390x/storage-keys.h"
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@ -844,6 +845,45 @@ uint32_t HELPER(trt)(CPUS390XState *env, uint32_t len, uint64_t array,
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return cc;
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return cc;
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}
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}
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void HELPER(cdsg)(CPUS390XState *env, uint64_t addr,
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uint32_t r1, uint32_t r3)
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{
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uintptr_t ra = GETPC();
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Int128 cmpv = int128_make128(env->regs[r1 + 1], env->regs[r1]);
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Int128 newv = int128_make128(env->regs[r3 + 1], env->regs[r3]);
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Int128 oldv;
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bool fail;
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if (parallel_cpus) {
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#ifndef CONFIG_ATOMIC128
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cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
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#else
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int mem_idx = cpu_mmu_index(env, false);
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TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
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oldv = helper_atomic_cmpxchgo_be_mmu(env, addr, cmpv, newv, oi, ra);
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fail = !int128_eq(oldv, cmpv);
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#endif
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} else {
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uint64_t oldh, oldl;
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oldh = cpu_ldq_data_ra(env, addr + 0, ra);
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oldl = cpu_ldq_data_ra(env, addr + 8, ra);
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oldv = int128_make128(oldl, oldh);
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fail = !int128_eq(oldv, cmpv);
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if (fail) {
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newv = oldv;
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}
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cpu_stq_data_ra(env, addr + 0, int128_gethi(newv), ra);
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cpu_stq_data_ra(env, addr + 8, int128_getlo(newv), ra);
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}
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env->cc_op = fail;
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env->regs[r1] = int128_gethi(oldv);
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env->regs[r1 + 1] = int128_getlo(oldv);
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}
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3)
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void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3)
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{
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{
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@ -1943,102 +1943,47 @@ static ExitStatus op_cps(DisasContext *s, DisasOps *o)
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static ExitStatus op_cs(DisasContext *s, DisasOps *o)
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static ExitStatus op_cs(DisasContext *s, DisasOps *o)
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{
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{
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/* FIXME: needs an atomic solution for CONFIG_USER_ONLY. */
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int d2 = get_field(s->fields, d2);
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int d2 = get_field(s->fields, d2);
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int b2 = get_field(s->fields, b2);
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int b2 = get_field(s->fields, b2);
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int is_64 = s->insn->data;
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TCGv_i64 addr, cc;
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TCGv_i64 addr, mem, cc, z;
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/* Note that in1 = R3 (new value) and
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/* Note that in1 = R3 (new value) and
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in2 = (zero-extended) R1 (expected value). */
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in2 = (zero-extended) R1 (expected value). */
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/* Load the memory into the (temporary) output. While the PoO only talks
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about moving the memory to R1 on inequality, if we include equality it
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means that R1 is equal to the memory in all conditions. */
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addr = get_address(s, 0, b2, d2);
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addr = get_address(s, 0, b2, d2);
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if (is_64) {
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tcg_gen_atomic_cmpxchg_i64(o->out, addr, o->in2, o->in1,
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tcg_gen_qemu_ld64(o->out, addr, get_mem_index(s));
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get_mem_index(s), s->insn->data | MO_ALIGN);
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} else {
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tcg_temp_free_i64(addr);
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tcg_gen_qemu_ld32u(o->out, addr, get_mem_index(s));
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}
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/* Are the memory and expected values (un)equal? Note that this setcond
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/* Are the memory and expected values (un)equal? Note that this setcond
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produces the output CC value, thus the NE sense of the test. */
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produces the output CC value, thus the NE sense of the test. */
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cc = tcg_temp_new_i64();
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cc = tcg_temp_new_i64();
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tcg_gen_setcond_i64(TCG_COND_NE, cc, o->in2, o->out);
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tcg_gen_setcond_i64(TCG_COND_NE, cc, o->in2, o->out);
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/* If the memory and expected values are equal (CC==0), copy R3 to MEM.
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Recall that we are allowed to unconditionally issue the store (and
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thus any possible write trap), so (re-)store the original contents
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of MEM in case of inequality. */
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z = tcg_const_i64(0);
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mem = tcg_temp_new_i64();
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tcg_gen_movcond_i64(TCG_COND_EQ, mem, cc, z, o->in1, o->out);
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if (is_64) {
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tcg_gen_qemu_st64(mem, addr, get_mem_index(s));
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} else {
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tcg_gen_qemu_st32(mem, addr, get_mem_index(s));
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}
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tcg_temp_free_i64(z);
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tcg_temp_free_i64(mem);
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tcg_temp_free_i64(addr);
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/* Store CC back to cc_op. Wait until after the store so that any
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exception gets the old cc_op value. */
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tcg_gen_extrl_i64_i32(cc_op, cc);
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tcg_gen_extrl_i64_i32(cc_op, cc);
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tcg_temp_free_i64(cc);
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tcg_temp_free_i64(cc);
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set_cc_static(s);
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set_cc_static(s);
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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static ExitStatus op_cdsg(DisasContext *s, DisasOps *o)
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static ExitStatus op_cdsg(DisasContext *s, DisasOps *o)
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{
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{
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/* FIXME: needs an atomic solution for CONFIG_USER_ONLY. */
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int r1 = get_field(s->fields, r1);
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int r1 = get_field(s->fields, r1);
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int r3 = get_field(s->fields, r3);
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int r3 = get_field(s->fields, r3);
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int d2 = get_field(s->fields, d2);
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int d2 = get_field(s->fields, d2);
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int b2 = get_field(s->fields, b2);
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int b2 = get_field(s->fields, b2);
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TCGv_i64 addrh, addrl, memh, meml, outh, outl, cc, z;
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TCGv_i64 addr;
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TCGv_i32 t_r1, t_r3;
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/* Note that R1:R1+1 = expected value and R3:R3+1 = new value. */
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/* Note that R1:R1+1 = expected value and R3:R3+1 = new value. */
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addr = get_address(s, 0, b2, d2);
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t_r1 = tcg_const_i32(r1);
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t_r3 = tcg_const_i32(r3);
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gen_helper_cdsg(cpu_env, addr, t_r1, t_r3);
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tcg_temp_free_i64(addr);
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tcg_temp_free_i32(t_r1);
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tcg_temp_free_i32(t_r3);
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addrh = get_address(s, 0, b2, d2);
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addrl = get_address(s, 0, b2, d2 + 8);
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outh = tcg_temp_new_i64();
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outl = tcg_temp_new_i64();
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tcg_gen_qemu_ld64(outh, addrh, get_mem_index(s));
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tcg_gen_qemu_ld64(outl, addrl, get_mem_index(s));
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/* Fold the double-word compare with arithmetic. */
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cc = tcg_temp_new_i64();
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z = tcg_temp_new_i64();
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tcg_gen_xor_i64(cc, outh, regs[r1]);
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tcg_gen_xor_i64(z, outl, regs[r1 + 1]);
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tcg_gen_or_i64(cc, cc, z);
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tcg_gen_movi_i64(z, 0);
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tcg_gen_setcond_i64(TCG_COND_NE, cc, cc, z);
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memh = tcg_temp_new_i64();
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meml = tcg_temp_new_i64();
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tcg_gen_movcond_i64(TCG_COND_EQ, memh, cc, z, regs[r3], outh);
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tcg_gen_movcond_i64(TCG_COND_EQ, meml, cc, z, regs[r3 + 1], outl);
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tcg_temp_free_i64(z);
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tcg_gen_qemu_st64(memh, addrh, get_mem_index(s));
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tcg_gen_qemu_st64(meml, addrl, get_mem_index(s));
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tcg_temp_free_i64(memh);
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tcg_temp_free_i64(meml);
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tcg_temp_free_i64(addrh);
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tcg_temp_free_i64(addrl);
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/* Save back state now that we've passed all exceptions. */
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tcg_gen_mov_i64(regs[r1], outh);
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tcg_gen_mov_i64(regs[r1 + 1], outl);
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tcg_gen_extrl_i64_i32(cc_op, cc);
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tcg_temp_free_i64(outh);
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tcg_temp_free_i64(outl);
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tcg_temp_free_i64(cc);
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set_cc_static(s);
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set_cc_static(s);
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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