target-mips: update address space definitions

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2010-03-13 01:39:17 +01:00
parent 65850a0254
commit 30724e758a

View file

@ -8,14 +8,14 @@
#define TARGET_PAGE_BITS 12 #define TARGET_PAGE_BITS 12
#define MIPS_TLB_MAX 128 #define MIPS_TLB_MAX 128
/* ??? MIPS64 no doubt has a larger address space. */
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#if defined(TARGET_MIPS64) #if defined(TARGET_MIPS64)
#define TARGET_LONG_BITS 64 #define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 42
#else #else
#define TARGET_LONG_BITS 32 #define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif #endif
/* Masks used to mark instructions to indicate which ISA level they /* Masks used to mark instructions to indicate which ISA level they