aspeed/scu: Fix W1C behavior
This models the clock write one to clear registers, and fixes up some incorrect behavior in all of the write to clear registers. There was also a typo in one of the register definitions. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 20191119141211.25716-8-clg@kaod.org [clg: checkpatch.pl fixes ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -98,7 +98,7 @@
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#define AST2600_CLK_STOP_CTRL TO_REG(0x80)
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#define AST2600_CLK_STOP_CTRL_CLR TO_REG(0x84)
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#define AST2600_CLK_STOP_CTRL2 TO_REG(0x90)
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#define AST2600_CLK_STOP_CTR2L_CLR TO_REG(0x94)
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#define AST2600_CLK_STOP_CTRL2_CLR TO_REG(0x94)
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#define AST2600_SDRAM_HANDSHAKE TO_REG(0x100)
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#define AST2600_HPLL_PARAM TO_REG(0x200)
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#define AST2600_HPLL_EXT TO_REG(0x204)
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@ -532,11 +532,13 @@ static uint64_t aspeed_ast2600_scu_read(void *opaque, hwaddr offset,
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return s->regs[reg];
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}
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static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data,
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unsigned size)
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static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset,
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uint64_t data64, unsigned size)
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{
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AspeedSCUState *s = ASPEED_SCU(opaque);
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int reg = TO_REG(offset);
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/* Truncate here so bitwise operations below behave as expected */
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uint32_t data = data64;
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if (reg >= ASPEED_AST2600_SCU_NR_REGS) {
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qemu_log_mask(LOG_GUEST_ERROR,
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@ -563,15 +565,22 @@ static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data,
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/* fall through */
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case AST2600_SYS_RST_CTRL:
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case AST2600_SYS_RST_CTRL2:
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case AST2600_CLK_STOP_CTRL:
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case AST2600_CLK_STOP_CTRL2:
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/* W1S (Write 1 to set) registers */
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s->regs[reg] |= data;
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return;
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case AST2600_SYS_RST_CTRL_CLR:
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case AST2600_SYS_RST_CTRL2_CLR:
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case AST2600_CLK_STOP_CTRL_CLR:
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case AST2600_CLK_STOP_CTRL2_CLR:
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case AST2600_HW_STRAP1_CLR:
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case AST2600_HW_STRAP2_CLR:
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/* W1C (Write 1 to clear) registers */
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s->regs[reg] &= ~data;
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/*
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* W1C (Write 1 to clear) registers are offset by one address from
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* the data register
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*/
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s->regs[reg - 1] &= ~data;
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return;
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case AST2600_RNG_DATA:
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