target/s390x: Return exception from mmu_translate_real
Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-8-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
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@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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if (!(env->psw.mask & PSW_MASK_64)) {
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vaddr &= 0x7fffffff;
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}
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fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot);
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excp = 0; /* exception already raised */
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excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec);
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fail = excp;
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} else {
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g_assert_not_reached();
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}
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@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len,
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int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
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target_ulong *raddr, int *flags, bool exc);
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int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw,
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target_ulong *addr, int *flags);
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target_ulong *addr, int *flags, uint64_t *tec);
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/* misc_helper.c */
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@ -554,14 +554,11 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr_t ra)
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* @param rw 0 = read, 1 = write, 2 = code fetch
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* @param addr the translated address is stored to this pointer
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* @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer
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* @return 0 if the translation was successful, < 0 if a fault occurred
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* @return 0 = success, != 0, the exception to raise
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*/
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int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw,
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target_ulong *addr, int *flags)
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target_ulong *addr, int *flags, uint64_t *tec)
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{
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/* Code accesses have an undefined ilc, let's use 2 bytes. */
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uint64_t tec = (raddr & TARGET_PAGE_MASK) |
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(rw == MMU_DATA_STORE ? FS_WRITE : FS_READ);
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const bool lowprot_enabled = env->cregs[0] & CR0_LOWPROT;
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*flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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@ -570,9 +567,10 @@ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw,
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*flags |= PAGE_WRITE_INV;
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if (is_low_address(raddr) && rw == MMU_DATA_STORE) {
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/* LAP sets bit 56 */
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tec |= 0x80;
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trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, tec);
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return -EACCES;
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*tec = (raddr & TARGET_PAGE_MASK)
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| (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ)
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| 0x80;
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return PGM_PROTECTION;
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}
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}
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