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target/ppc: Add SPR ASDR

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The Access Segment Descriptor Register (ASDR) provides information about
the storage element when taking a hypervisor storage interrupt. When
performing nested radix address translation, this is normally the guest
real address. This register is present on POWER9 processors and later.

Implement the ADSR, note read and write access is limited to the
hypervisor.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191128134700.16091-4-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Suraj Jitindar Singh 2019-11-28 14:46:56 +01:00 committed by David Gibson
parent 5cc7e69f6d
commit 32d0f0d8de
2 changed files with 7 additions and 0 deletions
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1
target/ppc/cpu.h
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@ -1778,6 +1778,7 @@ typedef PowerPCCPU ArchCPU;
#define SPR_MPC_MD_DBRAM1 (0x32A)
#define SPR_RCPU_L2U_RA3 (0x32B)
#define SPR_TAR (0x32F)
#define SPR_ASDR (0x330)
#define SPR_IC (0x350)
#define SPR_VTB (0x351)
#define SPR_MMCRC (0x353)

6
target/ppc/translate_init.inc.c
View file

@ -8295,6 +8295,12 @@ static void gen_spr_power9_mmu(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_ptcr,
KVM_REG_PPC_PTCR, 0x00000000);
/* Address Segment Descriptor Register */
spr_register_hv(env, SPR_ASDR, "ASDR",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x0000000000000000);
#endif
}