target/ppc: Convert to CPUClass::tlb_fill
Cc: qemu-ppc@nongnu.org Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1311,10 +1311,9 @@ void ppc_translate_init(void);
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* is returned if the signal was handled by the virtual CPU.
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*/
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int cpu_ppc_signal_handler(int host_signum, void *pinfo, void *puc);
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#if defined(CONFIG_USER_ONLY)
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int ppc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw,
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int mmu_idx);
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#endif
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bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#if !defined(CONFIG_USER_ONLY)
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void ppc_store_sdr1(CPUPPCState *env, target_ulong value);
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@ -3057,15 +3057,9 @@ void helper_check_tlb_flush_global(CPUPPCState *env)
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/*****************************************************************************/
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/*
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* try to fill the TLB and return an exception if error. If retaddr is
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* NULL, it means that the function was called in C code (i.e. not
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* from generated code or from helper.c)
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*
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* XXX: fix it to restore all registers
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*/
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void tlb_fill(CPUState *cs, target_ulong addr, int size,
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MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
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bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
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@ -3078,7 +3072,17 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
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ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx);
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}
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if (unlikely(ret != 0)) {
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if (probe) {
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return false;
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}
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raise_exception_err_ra(env, cs->exception_index, env->error_code,
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retaddr);
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}
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return true;
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}
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void tlb_fill(CPUState *cs, target_ulong addr, int size,
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MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
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{
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ppc_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
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}
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@ -10592,9 +10592,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_read_register = ppc_cpu_gdb_read_register;
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cc->gdb_write_register = ppc_cpu_gdb_write_register;
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cc->do_unaligned_access = ppc_cpu_do_unaligned_access;
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = ppc_cpu_handle_mmu_fault;
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#else
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#ifndef CONFIG_USER_ONLY
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cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
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cc->vmsd = &vmstate_ppc_cpu;
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#endif
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@ -10624,6 +10622,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
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#endif
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#ifdef CONFIG_TCG
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cc->tcg_initialize = ppc_translate_init;
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cc->tlb_fill = ppc_cpu_tlb_fill;
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#endif
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cc->disas_set_info = ppc_disas_set_info;
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@ -20,21 +20,24 @@
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
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int mmu_idx)
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bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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int exception, error_code;
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if (rw == 2) {
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if (access_type == MMU_INST_FETCH) {
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exception = POWERPC_EXCP_ISI;
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error_code = 0x40000000;
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} else {
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exception = POWERPC_EXCP_DSI;
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error_code = 0x40000000;
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if (rw) {
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if (access_type == MMU_DATA_STORE) {
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error_code |= 0x02000000;
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}
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env->spr[SPR_DAR] = address;
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@ -42,6 +45,5 @@ int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
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}
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cs->exception_index = exception;
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env->error_code = error_code;
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return 1;
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cpu_loop_exit_restore(cs, retaddr);
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}
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