x86_iommu: move vtd_generate_msi_message in common file
The vtd_generate_msi_message() in intel-iommu is used to construct a MSI Message from IRQ. A similar function will be needed when we add interrupt remapping support in amd-iommu. Moving the function in common file to avoid the code duplication. Rename it to x86_iommu_irq_to_msi_message(). There is no logic changes in the code flow. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Suggested-by: Peter Xu <peterx@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Cc: Peter Xu <peterx@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Cc: Tom Lendacky <Thomas.Lendacky@amd.com> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -2716,7 +2716,7 @@ static int vtd_irte_get(IntelIOMMUState *iommu, uint16_t index,
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/* Fetch IRQ information of specific IR index */
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static int vtd_remap_irq_get(IntelIOMMUState *iommu, uint16_t index,
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VTDIrq *irq, uint16_t sid)
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X86IOMMUIrq *irq, uint16_t sid)
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{
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VTD_IR_TableEntry irte = {};
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int ret = 0;
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@ -2745,30 +2745,6 @@ static int vtd_remap_irq_get(IntelIOMMUState *iommu, uint16_t index,
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return 0;
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}
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/* Generate one MSI message from VTDIrq info */
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static void vtd_generate_msi_message(VTDIrq *irq, MSIMessage *msg_out)
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{
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VTD_MSIMessage msg = {};
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/* Generate address bits */
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msg.dest_mode = irq->dest_mode;
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msg.redir_hint = irq->redir_hint;
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msg.dest = irq->dest;
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msg.__addr_hi = irq->dest & 0xffffff00;
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msg.__addr_head = cpu_to_le32(0xfee);
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/* Keep this from original MSI address bits */
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msg.__not_used = irq->msi_addr_last_bits;
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/* Generate data bits */
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msg.vector = irq->vector;
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msg.delivery_mode = irq->delivery_mode;
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msg.level = 1;
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msg.trigger_mode = irq->trigger_mode;
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msg_out->address = msg.msi_addr;
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msg_out->data = msg.msi_data;
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}
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/* Interrupt remapping for MSI/MSI-X entry */
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static int vtd_interrupt_remap_msi(IntelIOMMUState *iommu,
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MSIMessage *origin,
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@ -2778,7 +2754,7 @@ static int vtd_interrupt_remap_msi(IntelIOMMUState *iommu,
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int ret = 0;
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VTD_IR_MSIAddress addr;
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uint16_t index;
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VTDIrq irq = {};
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X86IOMMUIrq irq = {};
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assert(origin && translated);
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@ -2857,8 +2833,8 @@ static int vtd_interrupt_remap_msi(IntelIOMMUState *iommu,
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*/
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irq.msi_addr_last_bits = addr.addr.__not_care;
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/* Translate VTDIrq to MSI message */
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vtd_generate_msi_message(&irq, translated);
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/* Translate X86IOMMUIrq to MSI message */
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x86_iommu_irq_to_msi_message(&irq, translated);
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out:
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trace_vtd_ir_remap_msi(origin->address, origin->data,
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@ -53,6 +53,30 @@ void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
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}
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}
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/* Generate one MSI message from VTDIrq info */
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void x86_iommu_irq_to_msi_message(X86IOMMUIrq *irq, MSIMessage *msg_out)
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{
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X86IOMMU_MSIMessage msg = {};
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/* Generate address bits */
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msg.dest_mode = irq->dest_mode;
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msg.redir_hint = irq->redir_hint;
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msg.dest = irq->dest;
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msg.__addr_hi = irq->dest & 0xffffff00;
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msg.__addr_head = cpu_to_le32(0xfee);
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/* Keep this from original MSI address bits */
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msg.__not_used = irq->msi_addr_last_bits;
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/* Generate data bits */
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msg.vector = irq->vector;
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msg.delivery_mode = irq->delivery_mode;
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msg.level = 1;
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msg.trigger_mode = irq->trigger_mode;
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msg_out->address = msg.msi_addr;
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msg_out->data = msg.msi_data;
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}
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/* Default X86 IOMMU device */
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static X86IOMMUState *x86_iommu_default = NULL;
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@ -66,8 +66,6 @@ typedef struct VTDIOTLBEntry VTDIOTLBEntry;
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typedef struct VTDBus VTDBus;
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typedef union VTD_IR_TableEntry VTD_IR_TableEntry;
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typedef union VTD_IR_MSIAddress VTD_IR_MSIAddress;
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typedef struct VTDIrq VTDIrq;
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typedef struct VTD_MSIMessage VTD_MSIMessage;
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/* Context-Entry */
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struct VTDContextEntry {
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@ -197,63 +195,6 @@ union VTD_IR_MSIAddress {
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uint32_t data;
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};
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/* Generic IRQ entry information */
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struct VTDIrq {
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/* Used by both IOAPIC/MSI interrupt remapping */
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uint8_t trigger_mode;
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uint8_t vector;
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uint8_t delivery_mode;
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uint32_t dest;
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uint8_t dest_mode;
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/* only used by MSI interrupt remapping */
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uint8_t redir_hint;
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uint8_t msi_addr_last_bits;
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};
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struct VTD_MSIMessage {
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union {
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struct {
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#ifdef HOST_WORDS_BIGENDIAN
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uint32_t __addr_head:12; /* 0xfee */
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uint32_t dest:8;
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uint32_t __reserved:8;
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uint32_t redir_hint:1;
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uint32_t dest_mode:1;
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uint32_t __not_used:2;
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#else
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uint32_t __not_used:2;
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uint32_t dest_mode:1;
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uint32_t redir_hint:1;
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uint32_t __reserved:8;
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uint32_t dest:8;
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uint32_t __addr_head:12; /* 0xfee */
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#endif
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uint32_t __addr_hi;
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} QEMU_PACKED;
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uint64_t msi_addr;
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};
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union {
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struct {
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#ifdef HOST_WORDS_BIGENDIAN
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uint16_t trigger_mode:1;
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uint16_t level:1;
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uint16_t __resved:3;
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uint16_t delivery_mode:3;
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uint16_t vector:8;
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#else
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uint16_t vector:8;
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uint16_t delivery_mode:3;
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uint16_t __resved:3;
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uint16_t level:1;
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uint16_t trigger_mode:1;
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#endif
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uint16_t __resved1;
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} QEMU_PACKED;
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uint32_t msi_data;
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};
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};
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/* When IR is enabled, all MSI/MSI-X data bits should be zero */
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#define VTD_IR_MSI_DATA (0)
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@ -22,6 +22,7 @@
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#include "hw/sysbus.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/msi.h"
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#define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
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#define X86_IOMMU_DEVICE(obj) \
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@ -35,6 +36,8 @@
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typedef struct X86IOMMUState X86IOMMUState;
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typedef struct X86IOMMUClass X86IOMMUClass;
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typedef struct X86IOMMUIrq X86IOMMUIrq;
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typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage;
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typedef enum IommuType {
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TYPE_INTEL,
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@ -78,6 +81,63 @@ struct X86IOMMUState {
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QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */
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};
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/* Generic IRQ entry information when interrupt remapping is enabled */
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struct X86IOMMUIrq {
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/* Used by both IOAPIC/MSI interrupt remapping */
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uint8_t trigger_mode;
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uint8_t vector;
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uint8_t delivery_mode;
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uint32_t dest;
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uint8_t dest_mode;
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/* only used by MSI interrupt remapping */
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uint8_t redir_hint;
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uint8_t msi_addr_last_bits;
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};
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struct X86IOMMU_MSIMessage {
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union {
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struct {
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#ifdef HOST_WORDS_BIGENDIAN
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uint32_t __addr_head:12; /* 0xfee */
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uint32_t dest:8;
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uint32_t __reserved:8;
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uint32_t redir_hint:1;
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uint32_t dest_mode:1;
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uint32_t __not_used:2;
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#else
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uint32_t __not_used:2;
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uint32_t dest_mode:1;
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uint32_t redir_hint:1;
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uint32_t __reserved:8;
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uint32_t dest:8;
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uint32_t __addr_head:12; /* 0xfee */
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#endif
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uint32_t __addr_hi;
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} QEMU_PACKED;
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uint64_t msi_addr;
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};
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union {
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struct {
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#ifdef HOST_WORDS_BIGENDIAN
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uint16_t trigger_mode:1;
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uint16_t level:1;
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uint16_t __resved:3;
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uint16_t delivery_mode:3;
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uint16_t vector:8;
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#else
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uint16_t vector:8;
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uint16_t delivery_mode:3;
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uint16_t __resved:3;
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uint16_t level:1;
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uint16_t trigger_mode:1;
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#endif
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uint16_t __resved1;
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} QEMU_PACKED;
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uint32_t msi_data;
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};
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};
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/**
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* x86_iommu_get_default - get default IOMMU device
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* @return: pointer to default IOMMU device
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@ -110,4 +170,10 @@ void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
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void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
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uint32_t index, uint32_t mask);
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/**
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* x86_iommu_irq_to_msi_message - Populate one MSIMessage from X86IOMMUIrq
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* @X86IOMMUIrq: The IRQ information
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* @out: Output MSI message
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*/
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void x86_iommu_irq_to_msi_message(X86IOMMUIrq *irq, MSIMessage *out);
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#endif
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