target/arm: Split out gen_gvec_ool_zzzp
Model after gen_gvec_fn_zzz et al. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200815013145.539409-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -142,8 +142,19 @@ static int pred_gvec_reg_size(DisasContext *s)
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return size_for_gvec(pred_full_reg_size(s));
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return size_for_gvec(pred_full_reg_size(s));
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}
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}
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/* Invoke a vector expander on two Zregs. */
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/* Invoke an out-of-line helper on 3 Zregs and a predicate. */
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static void gen_gvec_ool_zzzp(DisasContext *s, gen_helper_gvec_4 *fn,
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int rd, int rn, int rm, int pg, int data)
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{
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unsigned vsz = vec_full_reg_size(s);
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tcg_gen_gvec_4_ool(vec_full_reg_offset(s, rd),
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vec_full_reg_offset(s, rn),
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vec_full_reg_offset(s, rm),
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pred_full_reg_offset(s, pg),
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vsz, vsz, data, fn);
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}
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/* Invoke a vector expander on two Zregs. */
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static void gen_gvec_fn_zz(DisasContext *s, GVecGen2Fn *gvec_fn,
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static void gen_gvec_fn_zz(DisasContext *s, GVecGen2Fn *gvec_fn,
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int esz, int rd, int rn)
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int esz, int rd, int rn)
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{
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{
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@ -314,16 +325,11 @@ static bool trans_UQSUB_zzz(DisasContext *s, arg_rrr_esz *a)
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static bool do_zpzz_ool(DisasContext *s, arg_rprr_esz *a, gen_helper_gvec_4 *fn)
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static bool do_zpzz_ool(DisasContext *s, arg_rprr_esz *a, gen_helper_gvec_4 *fn)
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{
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{
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unsigned vsz = vec_full_reg_size(s);
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if (fn == NULL) {
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if (fn == NULL) {
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return false;
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return false;
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}
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}
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if (sve_access_check(s)) {
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if (sve_access_check(s)) {
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tcg_gen_gvec_4_ool(vec_full_reg_offset(s, a->rd),
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gen_gvec_ool_zzzp(s, fn, a->rd, a->rn, a->rm, a->pg, 0);
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vec_full_reg_offset(s, a->rn),
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vec_full_reg_offset(s, a->rm),
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pred_full_reg_offset(s, a->pg),
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vsz, vsz, 0, fn);
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}
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}
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return true;
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return true;
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}
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}
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@ -337,12 +343,7 @@ static void do_sel_z(DisasContext *s, int rd, int rn, int rm, int pg, int esz)
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gen_helper_sve_sel_zpzz_b, gen_helper_sve_sel_zpzz_h,
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gen_helper_sve_sel_zpzz_b, gen_helper_sve_sel_zpzz_h,
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gen_helper_sve_sel_zpzz_s, gen_helper_sve_sel_zpzz_d
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gen_helper_sve_sel_zpzz_s, gen_helper_sve_sel_zpzz_d
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};
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};
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unsigned vsz = vec_full_reg_size(s);
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gen_gvec_ool_zzzp(s, fns[esz], rd, rn, rm, pg, 0);
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tcg_gen_gvec_4_ool(vec_full_reg_offset(s, rd),
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vec_full_reg_offset(s, rn),
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vec_full_reg_offset(s, rm),
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pred_full_reg_offset(s, pg),
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vsz, vsz, 0, fns[esz]);
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}
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}
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#define DO_ZPZZ(NAME, name) \
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#define DO_ZPZZ(NAME, name) \
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@ -2704,12 +2705,8 @@ static bool trans_RBIT(DisasContext *s, arg_rpr_esz *a)
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static bool trans_SPLICE(DisasContext *s, arg_rprr_esz *a)
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static bool trans_SPLICE(DisasContext *s, arg_rprr_esz *a)
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{
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{
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if (sve_access_check(s)) {
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if (sve_access_check(s)) {
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unsigned vsz = vec_full_reg_size(s);
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gen_gvec_ool_zzzp(s, gen_helper_sve_splice,
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tcg_gen_gvec_4_ool(vec_full_reg_offset(s, a->rd),
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a->rd, a->rn, a->rm, a->pg, 0);
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vec_full_reg_offset(s, a->rn),
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vec_full_reg_offset(s, a->rm),
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pred_full_reg_offset(s, a->pg),
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vsz, vsz, a->esz, gen_helper_sve_splice);
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}
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}
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return true;
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return true;
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}
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}
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