target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers
SMC must UNDEF if EL3 is not implemented; similarly HVC UNDEFs if EL2 is not implemented. Move the handling of this from translate-a64.c into the pre_smc and pre_hvc helper functions. This is necessary because use of these instructions for PSCI takes precedence over this UNDEF case, and we can't tell if this is a PSCI call until runtime. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1412865028-17725-5-git-send-email-peter.maydell@linaro.org
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@ -392,10 +392,11 @@ void HELPER(pre_hvc)(CPUARMState *env)
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bool secure = false;
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bool secure = false;
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bool undef;
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bool undef;
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/* We've already checked that EL2 exists at translation time.
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if (!arm_feature(env, ARM_FEATURE_EL2)) {
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* EL3.HCE has priority over EL2.HCD.
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/* If EL2 doesn't exist, HVC always UNDEFs */
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*/
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undef = true;
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if (arm_feature(env, ARM_FEATURE_EL3)) {
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} else if (arm_feature(env, ARM_FEATURE_EL3)) {
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/* EL3.HCE has priority over EL2.HCD. */
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undef = !(env->cp15.scr_el3 & SCR_HCE);
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undef = !(env->cp15.scr_el3 & SCR_HCE);
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} else {
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} else {
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undef = env->cp15.hcr_el2 & HCR_HCD;
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undef = env->cp15.hcr_el2 & HCR_HCD;
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@ -429,13 +430,15 @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
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*/
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*/
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bool undef = is_a64(env) ? smd : (!secure && smd);
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bool undef = is_a64(env) ? smd : (!secure && smd);
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if (!arm_feature(env, ARM_FEATURE_EL3)) {
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/* If we have no EL3 then SMC always UNDEFs */
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undef = true;
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} else if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
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/* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
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/* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
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if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
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env->exception.syndrome = syndrome;
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env->exception.syndrome = syndrome;
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raise_exception(env, EXCP_HYP_TRAP);
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raise_exception(env, EXCP_HYP_TRAP);
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}
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}
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/* We've already checked that EL3 exists at translation time. */
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if (undef) {
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if (undef) {
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env->exception.syndrome = syn_uncategorized();
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env->exception.syndrome = syn_uncategorized();
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raise_exception(env, EXCP_UDEF);
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raise_exception(env, EXCP_UDEF);
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@ -1485,7 +1485,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
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gen_exception_insn(s, 0, EXCP_SWI, syn_aa64_svc(imm16));
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gen_exception_insn(s, 0, EXCP_SWI, syn_aa64_svc(imm16));
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break;
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break;
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case 2:
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case 2:
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if (!arm_dc_feature(s, ARM_FEATURE_EL2) || s->current_pl == 0) {
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if (s->current_pl == 0) {
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unallocated_encoding(s);
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unallocated_encoding(s);
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break;
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break;
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}
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}
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@ -1498,7 +1498,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
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gen_exception_insn(s, 0, EXCP_HVC, syn_aa64_hvc(imm16));
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gen_exception_insn(s, 0, EXCP_HVC, syn_aa64_hvc(imm16));
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break;
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break;
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case 3:
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case 3:
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if (!arm_dc_feature(s, ARM_FEATURE_EL3) || s->current_pl == 0) {
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if (s->current_pl == 0) {
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unallocated_encoding(s);
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unallocated_encoding(s);
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break;
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break;
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}
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}
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