target/s390x: Improve ADD LOGICAL WITH CARRY
Now that ADD LOGICAL outputs carry, we can use that as input directly. It also means we can re-use CC_OP_ADDU and produce an output carry directly from ADD LOGICAL WITH CARRY. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201214221356.68039-3-richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -144,16 +144,6 @@ static uint32_t cc_calc_add_64(int64_t a1, int64_t a2, int64_t ar)
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}
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}
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static uint32_t cc_calc_addc_64(uint64_t a1, uint64_t a2, uint64_t ar)
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{
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/* Recover a2 + carry_in. */
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uint64_t a2c = ar - a1;
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/* Check for a2+carry_in overflow, then a1+a2c overflow. */
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int carry_out = (a2c < a2) || (ar < a1);
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return (ar != 0) + 2 * carry_out;
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}
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static uint32_t cc_calc_sub_64(int64_t a1, int64_t a2, int64_t ar)
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{
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if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
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@ -240,16 +230,6 @@ static uint32_t cc_calc_add_32(int32_t a1, int32_t a2, int32_t ar)
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}
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}
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static uint32_t cc_calc_addc_32(uint32_t a1, uint32_t a2, uint32_t ar)
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{
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/* Recover a2 + carry_in. */
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uint32_t a2c = ar - a1;
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/* Check for a2+carry_in overflow, then a1+a2c overflow. */
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int carry_out = (a2c < a2) || (ar < a1);
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return (ar != 0) + 2 * carry_out;
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}
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static uint32_t cc_calc_sub_32(int32_t a1, int32_t a2, int32_t ar)
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{
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if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
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@ -485,9 +465,6 @@ static uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
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case CC_OP_ADD_64:
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r = cc_calc_add_64(src, dst, vr);
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break;
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case CC_OP_ADDC_64:
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r = cc_calc_addc_64(src, dst, vr);
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break;
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case CC_OP_SUB_64:
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r = cc_calc_sub_64(src, dst, vr);
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break;
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@ -513,9 +490,6 @@ static uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
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case CC_OP_ADD_32:
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r = cc_calc_add_32(src, dst, vr);
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break;
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case CC_OP_ADDC_32:
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r = cc_calc_addc_32(src, dst, vr);
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break;
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case CC_OP_SUB_32:
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r = cc_calc_sub_32(src, dst, vr);
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break;
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@ -403,14 +403,12 @@ const char *cc_name(enum cc_op cc_op)
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[CC_OP_LTGT0_32] = "CC_OP_LTGT0_32",
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[CC_OP_LTGT0_64] = "CC_OP_LTGT0_64",
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[CC_OP_ADD_64] = "CC_OP_ADD_64",
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[CC_OP_ADDC_64] = "CC_OP_ADDC_64",
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[CC_OP_SUB_64] = "CC_OP_SUB_64",
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[CC_OP_SUBU_64] = "CC_OP_SUBU_64",
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[CC_OP_SUBB_64] = "CC_OP_SUBB_64",
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[CC_OP_ABS_64] = "CC_OP_ABS_64",
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[CC_OP_NABS_64] = "CC_OP_NABS_64",
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[CC_OP_ADD_32] = "CC_OP_ADD_32",
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[CC_OP_ADDC_32] = "CC_OP_ADDC_32",
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[CC_OP_SUB_32] = "CC_OP_SUB_32",
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[CC_OP_SUBU_32] = "CC_OP_SUBU_32",
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[CC_OP_SUBB_32] = "CC_OP_SUBB_32",
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@ -82,10 +82,10 @@
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C(0xcc0a, ALSIH, RIL_a, HW, r1_sr32, i2_32u, new, r1_32h, add, addu32)
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C(0xcc0b, ALSIHN, RIL_a, HW, r1_sr32, i2_32u, new, r1_32h, add, 0)
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/* ADD LOGICAL WITH CARRY */
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C(0xb998, ALCR, RRE, Z, r1, r2, new, r1_32, addc, addc32)
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C(0xb988, ALCGR, RRE, Z, r1, r2, r1, 0, addc, addc64)
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C(0xe398, ALC, RXY_a, Z, r1, m2_32u, new, r1_32, addc, addc32)
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C(0xe388, ALCG, RXY_a, Z, r1, m2_64, r1, 0, addc, addc64)
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C(0xb998, ALCR, RRE, Z, r1_32u, r2_32u, new, r1_32, addc32, addu32)
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C(0xb988, ALCGR, RRE, Z, r1, r2, r1, 0, addc64, addu64)
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C(0xe398, ALC, RXY_a, Z, r1_32u, m2_32u, new, r1_32, addc32, addu32)
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C(0xe388, ALCG, RXY_a, Z, r1, m2_64, r1, 0, addc64, addu64)
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/* AND */
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C(0x1400, NR, RR_a, Z, r1, r2, new, r1_32, and, nz32)
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@ -170,7 +170,6 @@ enum cc_op {
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CC_OP_LTGT0_64, /* signed less/greater than 0 (64bit) */
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CC_OP_ADD_64, /* overflow on add (64bit) */
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CC_OP_ADDC_64, /* overflow on unsigned add-carry (64bit) */
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CC_OP_SUB_64, /* overflow on subtraction (64bit) */
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CC_OP_SUBU_64, /* overflow on unsigned subtraction (64bit) */
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CC_OP_SUBB_64, /* overflow on unsigned sub-borrow (64bit) */
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@ -179,7 +178,6 @@ enum cc_op {
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CC_OP_MULS_64, /* overflow on signed multiply (64bit) */
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CC_OP_ADD_32, /* overflow on add (32bit) */
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CC_OP_ADDC_32, /* overflow on unsigned add-carry (32bit) */
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CC_OP_SUB_32, /* overflow on subtraction (32bit) */
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CC_OP_SUBU_32, /* overflow on unsigned subtraction (32bit) */
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CC_OP_SUBB_32, /* overflow on unsigned sub-borrow (32bit) */
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@ -600,12 +600,10 @@ static void gen_op_calc_cc(DisasContext *s)
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dummy = tcg_const_i64(0);
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/* FALLTHRU */
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case CC_OP_ADD_64:
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case CC_OP_ADDC_64:
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case CC_OP_SUB_64:
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case CC_OP_SUBU_64:
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case CC_OP_SUBB_64:
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case CC_OP_ADD_32:
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case CC_OP_ADDC_32:
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case CC_OP_SUB_32:
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case CC_OP_SUBU_32:
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case CC_OP_SUBB_32:
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@ -665,12 +663,10 @@ static void gen_op_calc_cc(DisasContext *s)
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gen_helper_calc_cc(cc_op, cpu_env, local_cc_op, cc_src, cc_dst, dummy);
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break;
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case CC_OP_ADD_64:
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case CC_OP_ADDC_64:
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case CC_OP_SUB_64:
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case CC_OP_SUBU_64:
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case CC_OP_SUBB_64:
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case CC_OP_ADD_32:
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case CC_OP_ADDC_32:
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case CC_OP_SUB_32:
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case CC_OP_SUBU_32:
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case CC_OP_SUBB_32:
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@ -1443,30 +1439,41 @@ static DisasJumpType op_addu64(DisasContext *s, DisasOps *o)
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return DISAS_NEXT;
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}
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static DisasJumpType op_addc(DisasContext *s, DisasOps *o)
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/* Compute carry into cc_src. */
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static void compute_carry(DisasContext *s)
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{
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DisasCompare cmp;
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TCGv_i64 carry;
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tcg_gen_add_i64(o->out, o->in1, o->in2);
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/* The carry flag is the msb of CC, therefore the branch mask that would
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create that comparison is 3. Feeding the generated comparison to
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setcond produces the carry flag that we desire. */
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disas_jcc(s, &cmp, 3);
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carry = tcg_temp_new_i64();
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if (cmp.is_64) {
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tcg_gen_setcond_i64(cmp.cond, carry, cmp.u.s64.a, cmp.u.s64.b);
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} else {
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TCGv_i32 t = tcg_temp_new_i32();
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tcg_gen_setcond_i32(cmp.cond, t, cmp.u.s32.a, cmp.u.s32.b);
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tcg_gen_extu_i32_i64(carry, t);
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tcg_temp_free_i32(t);
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switch (s->cc_op) {
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case CC_OP_ADDU:
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/* The carry value is already in cc_src (1,0). */
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break;
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default:
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gen_op_calc_cc(s);
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/* fall through */
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case CC_OP_STATIC:
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/* The carry flag is the msb of CC; compute into cc_src. */
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tcg_gen_extu_i32_i64(cc_src, cc_op);
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tcg_gen_shri_i64(cc_src, cc_src, 1);
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break;
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}
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free_compare(&cmp);
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}
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static DisasJumpType op_addc32(DisasContext *s, DisasOps *o)
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{
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compute_carry(s);
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tcg_gen_add_i64(o->out, o->in1, o->in2);
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tcg_gen_add_i64(o->out, o->out, cc_src);
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return DISAS_NEXT;
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}
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static DisasJumpType op_addc64(DisasContext *s, DisasOps *o)
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{
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compute_carry(s);
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TCGv_i64 zero = tcg_const_i64(0);
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tcg_gen_add2_i64(o->out, cc_src, o->in1, zero, cc_src, zero);
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tcg_gen_add2_i64(o->out, cc_src, o->out, cc_src, o->in2, zero);
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tcg_temp_free_i64(zero);
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tcg_gen_add_i64(o->out, o->out, carry);
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tcg_temp_free_i64(carry);
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return DISAS_NEXT;
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}
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@ -5217,16 +5224,6 @@ static void cout_addu64(DisasContext *s, DisasOps *o)
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gen_op_update2_cc_i64(s, CC_OP_ADDU, cc_src, o->out);
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}
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static void cout_addc32(DisasContext *s, DisasOps *o)
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{
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gen_op_update3_cc_i64(s, CC_OP_ADDC_32, o->in1, o->in2, o->out);
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}
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static void cout_addc64(DisasContext *s, DisasOps *o)
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{
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gen_op_update3_cc_i64(s, CC_OP_ADDC_64, o->in1, o->in2, o->out);
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}
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static void cout_cmps32(DisasContext *s, DisasOps *o)
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{
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gen_op_update2_cc_i64(s, CC_OP_LTGT_32, o->in1, o->in2);
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