target/hppa: Convert to CPUClass::tlb_fill

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-04-02 15:30:10 +07:00
parent c038ec9346
commit 3c7bef03c5
3 changed files with 23 additions and 12 deletions

View file

@ -163,9 +163,8 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb; cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb;
cc->gdb_read_register = hppa_cpu_gdb_read_register; cc->gdb_read_register = hppa_cpu_gdb_read_register;
cc->gdb_write_register = hppa_cpu_gdb_write_register; cc->gdb_write_register = hppa_cpu_gdb_write_register;
#ifdef CONFIG_USER_ONLY cc->tlb_fill = hppa_cpu_tlb_fill;
cc->handle_mmu_fault = hppa_cpu_handle_mmu_fault; #ifndef CONFIG_USER_ONLY
#else
cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug; cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;
dc->vmsd = &vmstate_hppa_cpu; dc->vmsd = &vmstate_hppa_cpu;
#endif #endif

View file

@ -360,10 +360,10 @@ int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void hppa_cpu_do_interrupt(CPUState *cpu); void hppa_cpu_do_interrupt(CPUState *cpu);
bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
void hppa_cpu_dump_state(CPUState *cs, FILE *f, int); void hppa_cpu_dump_state(CPUState *cs, FILE *f, int);
#ifdef CONFIG_USER_ONLY bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, MMUAccessType access_type, int mmu_idx,
int rw, int midx); bool probe, uintptr_t retaddr);
#else #ifndef CONFIG_USER_ONLY
int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
int type, hwaddr *pphys, int *pprot); int type, hwaddr *pphys, int *pprot);
extern const MemoryRegionOps hppa_io_eir_ops; extern const MemoryRegionOps hppa_io_eir_ops;

View file

@ -25,8 +25,9 @@
#include "trace.h" #include "trace.h"
#ifdef CONFIG_USER_ONLY #ifdef CONFIG_USER_ONLY
int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
int size, int rw, int mmu_idx) MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{ {
HPPACPU *cpu = HPPA_CPU(cs); HPPACPU *cpu = HPPA_CPU(cs);
@ -34,7 +35,7 @@ int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
which would affect si_code. */ which would affect si_code. */
cs->exception_index = EXCP_DMP; cs->exception_index = EXCP_DMP;
cpu->env.cr[CR_IOR] = address; cpu->env.cr[CR_IOR] = address;
return 1; cpu_loop_exit_restore(cs, retaddr);
} }
#else #else
static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr) static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)
@ -213,8 +214,9 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
return excp == EXCP_DTLB_MISS ? -1 : phys; return excp == EXCP_DTLB_MISS ? -1 : phys;
} }
void tlb_fill(CPUState *cs, target_ulong addr, int size, bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
MMUAccessType type, int mmu_idx, uintptr_t retaddr) MMUAccessType type, int mmu_idx,
bool probe, uintptr_t retaddr)
{ {
HPPACPU *cpu = HPPA_CPU(cs); HPPACPU *cpu = HPPA_CPU(cs);
CPUHPPAState *env = &cpu->env; CPUHPPAState *env = &cpu->env;
@ -236,6 +238,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
excp = hppa_get_physical_address(env, addr, mmu_idx, excp = hppa_get_physical_address(env, addr, mmu_idx,
a_prot, &phys, &prot); a_prot, &phys, &prot);
if (unlikely(excp >= 0)) { if (unlikely(excp >= 0)) {
if (probe) {
return false;
}
trace_hppa_tlb_fill_excp(env, addr, size, type, mmu_idx); trace_hppa_tlb_fill_excp(env, addr, size, type, mmu_idx);
/* Failure. Raise the indicated exception. */ /* Failure. Raise the indicated exception. */
cs->exception_index = excp; cs->exception_index = excp;
@ -252,6 +257,13 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
/* Success! Store the translation into the QEMU TLB. */ /* Success! Store the translation into the QEMU TLB. */
tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK, tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,
prot, mmu_idx, TARGET_PAGE_SIZE); prot, mmu_idx, TARGET_PAGE_SIZE);
return true;
}
void tlb_fill(CPUState *cs, target_ulong addr, int size,
MMUAccessType type, int mmu_idx, uintptr_t retaddr)
{
hppa_cpu_tlb_fill(cs, addr, size, type, mmu_idx, false, retaddr);
} }
/* Insert (Insn/Data) TLB Address. Note this is PA 1.1 only. */ /* Insert (Insn/Data) TLB Address. Note this is PA 1.1 only. */