tcg/s390x: Mask TCGMemOp appropriately for indexing
Commit 2b7ec66f
fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG S390 backend.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -1390,7 +1390,7 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *dest)
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static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
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static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
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TCGReg base, TCGReg index, int disp)
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TCGReg base, TCGReg index, int disp)
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{
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{
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switch (opc) {
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switch (opc & (MO_SSIZE | MO_BSWAP)) {
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case MO_UB:
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case MO_UB:
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tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
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tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
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break;
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break;
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@ -1449,7 +1449,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
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static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
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static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
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TCGReg base, TCGReg index, int disp)
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TCGReg base, TCGReg index, int disp)
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{
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{
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switch (opc) {
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switch (opc & (MO_SIZE | MO_BSWAP)) {
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case MO_UB:
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case MO_UB:
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if (disp >= 0 && disp < 0x1000) {
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if (disp >= 0 && disp < 0x1000) {
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tcg_out_insn(s, RX, STC, data, base, index, disp);
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tcg_out_insn(s, RX, STC, data, base, index, disp);
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