pc,pci,virtio fixes and cleanups
This includes pc and pci cleanups, future-proofing of ROM files, and a virtio bugfix correcting splice on virtio console. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJSGvbsAAoJECgfDbjSjVRp0qsH/2N/b/5bNhL6gx5Kjigzv7Lt bmCUsSsUm/Rnhke2SpDPVdIOU9W5WIX2zte8qiXuBJi3j/RS9procbgUZrCetpUI GHQOn+n8e2TX/P9CIcHaN/bA1b+Kx+bvaVbDL/6P2PJvodbDGwDLp/9y+Tisv5Ye kLow8Y4ZJcaTlmPf/Mh1AnhNa3gel231A3qwugVUNDSyITM6pG/0M07xk8YBj+JJ 6DYrlK0bKMNDxPu5St+YP94D1ODv2zM1aio/TdMUaNfqTZM1iqGTj3zKkBS2PjT0 RhuU2x4N91lY/uCdudtWSj5dYtfRT/xw7qwNAz9IHNz6RlGeX0n++ClMC8z9Y8A= =Pc09 -----END PGP SIGNATURE----- Merge remote-tracking branch 'mst/tags/for_anthony' into stable-1.5 pc,pci,virtio fixes and cleanups This includes pc and pci cleanups, future-proofing of ROM files, and a virtio bugfix correcting splice on virtio console. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 26 Aug 2013 01:34:20 AM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Markus Armbruster (5) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: virtio: virtqueue_get_avail_bytes: fix desc_pa when loop over the indirect descriptor table pc_piix: Kill pc_init1() memory region args pc: pc_compat_1_4() now can call pc_compat_1_5() pc: Create pc_compat_*() functions pc: Kill pc_init_pci_1_0() pc: Don't explode QEMUMachineInitArgs into local variables needlessly pc: Don't prematurely explode QEMUMachineInitArgs ppc: Don't duplicate QEMUMachineInitArgs in PPCE500Params ppc: Don't explode QEMUMachineInitArgs into local variables needlessly sun4: Don't prematurely explode QEMUMachineInitArgs q35: Add PCIe switch to example q35 configuration loader: store FW CFG ROM files in RAM arch_init: align MR size to target page size pc: cleanup 1.4 compat support Message-id: 1377535318-30491-1-git-send-email-mst@redhat.com
This commit is contained in:
commit
3e998a7788
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@ -342,7 +342,8 @@ ram_addr_t migration_bitmap_find_and_reset_dirty(MemoryRegion *mr,
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{
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{
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unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS;
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unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS;
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unsigned long nr = base + (start >> TARGET_PAGE_BITS);
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unsigned long nr = base + (start >> TARGET_PAGE_BITS);
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unsigned long size = base + (int128_get64(mr->size) >> TARGET_PAGE_BITS);
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uint64_t mr_size = TARGET_PAGE_ALIGN(memory_region_size(mr));
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unsigned long size = base + (mr_size >> TARGET_PAGE_BITS);
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unsigned long next;
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unsigned long next;
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@ -91,6 +91,29 @@
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port = "4"
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port = "4"
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chassis = "4"
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chassis = "4"
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##
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# Example PCIe switch with two downstream ports
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#
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#[device "pcie-switch-upstream-port-1"]
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# driver = "x3130-upstream"
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# bus = "ich9-pcie-port-4"
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# addr = "00.0"
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#
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#[device "pcie-switch-downstream-port-1-1"]
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# driver = "xio3130-downstream"
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# multifunction = "on"
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# bus = "pcie-switch-upstream-port-1"
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# addr = "00.0"
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# port = "1"
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# chassis = "5"
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#
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#[device "pcie-switch-downstream-port-1-2"]
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# driver = "xio3130-downstream"
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# multifunction = "on"
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# bus = "pcie-switch-upstream-port-1"
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# addr = "00.1"
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# port = "1"
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# chassis = "6"
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[device "ich9-ehci-1"]
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[device "ich9-ehci-1"]
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driver = "ich9-usb-ehci1"
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driver = "ich9-usb-ehci1"
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@ -54,6 +54,8 @@
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#include <zlib.h>
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#include <zlib.h>
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bool rom_file_in_ram = true;
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static int roms_loaded;
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static int roms_loaded;
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/* return the size or -1 if error */
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/* return the size or -1 if error */
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@ -576,6 +578,7 @@ struct Rom {
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size_t datasize;
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size_t datasize;
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uint8_t *data;
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uint8_t *data;
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MemoryRegion *mr;
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int isrom;
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int isrom;
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char *fw_dir;
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char *fw_dir;
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char *fw_file;
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char *fw_file;
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@ -605,6 +608,21 @@ static void rom_insert(Rom *rom)
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QTAILQ_INSERT_TAIL(&roms, rom, next);
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QTAILQ_INSERT_TAIL(&roms, rom, next);
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}
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}
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static void *rom_set_mr(Rom *rom, Object *owner, const char *name)
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{
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void *data;
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rom->mr = g_malloc(sizeof(*rom->mr));
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memory_region_init_ram(rom->mr, owner, name, rom->datasize);
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memory_region_set_readonly(rom->mr, true);
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vmstate_register_ram_global(rom->mr);
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data = memory_region_get_ram_ptr(rom->mr);
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memcpy(data, rom->data, rom->datasize);
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return data;
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}
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int rom_add_file(const char *file, const char *fw_dir,
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int rom_add_file(const char *file, const char *fw_dir,
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hwaddr addr, int32_t bootindex)
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hwaddr addr, int32_t bootindex)
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{
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{
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@ -646,6 +664,7 @@ int rom_add_file(const char *file, const char *fw_dir,
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if (rom->fw_file && fw_cfg) {
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if (rom->fw_file && fw_cfg) {
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const char *basename;
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const char *basename;
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char fw_file_name[56];
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char fw_file_name[56];
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void *data;
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basename = strrchr(rom->fw_file, '/');
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basename = strrchr(rom->fw_file, '/');
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if (basename) {
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if (basename) {
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@ -655,8 +674,15 @@ int rom_add_file(const char *file, const char *fw_dir,
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}
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}
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snprintf(fw_file_name, sizeof(fw_file_name), "%s/%s", rom->fw_dir,
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snprintf(fw_file_name, sizeof(fw_file_name), "%s/%s", rom->fw_dir,
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basename);
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basename);
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fw_cfg_add_file(fw_cfg, fw_file_name, rom->data, rom->romsize);
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snprintf(devpath, sizeof(devpath), "/rom@%s", fw_file_name);
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snprintf(devpath, sizeof(devpath), "/rom@%s", fw_file_name);
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if (rom_file_in_ram) {
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data = rom_set_mr(rom, OBJECT(fw_cfg), devpath);
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} else {
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data = rom->data;
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}
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fw_cfg_add_file(fw_cfg, fw_file_name, data, rom->romsize);
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} else {
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} else {
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snprintf(devpath, sizeof(devpath), "/rom@" TARGET_FMT_plx, addr);
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snprintf(devpath, sizeof(devpath), "/rom@" TARGET_FMT_plx, addr);
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}
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}
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@ -731,7 +757,12 @@ static void rom_reset(void *unused)
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if (rom->data == NULL) {
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if (rom->data == NULL) {
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continue;
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continue;
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}
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}
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cpu_physical_memory_write_rom(rom->addr, rom->data, rom->datasize);
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if (rom->mr) {
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void *host = memory_region_get_ram_ptr(rom->mr);
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memcpy(host, rom->data, rom->datasize);
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} else {
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cpu_physical_memory_write_rom(rom->addr, rom->data, rom->datasize);
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}
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if (rom->isrom) {
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if (rom->isrom) {
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/* rom needs to be written only once */
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/* rom needs to be written only once */
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g_free(rom->data);
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g_free(rom->data);
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@ -781,6 +812,9 @@ static Rom *find_rom(hwaddr addr)
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if (rom->fw_file) {
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if (rom->fw_file) {
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continue;
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continue;
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}
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}
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if (rom->mr) {
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continue;
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}
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if (rom->addr > addr) {
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if (rom->addr > addr) {
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continue;
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continue;
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}
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}
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@ -808,6 +842,9 @@ int rom_copy(uint8_t *dest, hwaddr addr, size_t size)
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if (rom->fw_file) {
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if (rom->fw_file) {
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continue;
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continue;
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}
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}
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if (rom->mr) {
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continue;
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}
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if (rom->addr + rom->romsize < addr) {
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if (rom->addr + rom->romsize < addr) {
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continue;
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continue;
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}
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}
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@ -866,7 +903,13 @@ void do_info_roms(Monitor *mon, const QDict *qdict)
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Rom *rom;
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Rom *rom;
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QTAILQ_FOREACH(rom, &roms, next) {
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QTAILQ_FOREACH(rom, &roms, next) {
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if (!rom->fw_file) {
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if (rom->mr) {
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monitor_printf(mon, "%s"
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" size=0x%06zx name=\"%s\"\n",
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rom->mr->name,
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rom->romsize,
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rom->name);
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} else if (!rom->fw_file) {
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monitor_printf(mon, "addr=" TARGET_FMT_plx
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monitor_printf(mon, "addr=" TARGET_FMT_plx
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" size=0x%06zx mem=%s name=\"%s\"\n",
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" size=0x%06zx mem=%s name=\"%s\"\n",
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rom->addr, rom->romsize,
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rom->addr, rom->romsize,
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@ -25,6 +25,7 @@
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#include <glib.h>
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#include <glib.h>
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#include "hw/hw.h"
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#include "hw/hw.h"
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#include "hw/loader.h"
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#include "hw/i386/pc.h"
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#include "hw/i386/pc.h"
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#include "hw/i386/apic.h"
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#include "hw/i386/apic.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci.h"
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@ -60,17 +61,12 @@ static bool has_pvpanic;
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static bool has_pci_info = true;
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static bool has_pci_info = true;
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/* PC hardware initialisation */
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/* PC hardware initialisation */
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static void pc_init1(MemoryRegion *system_memory,
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static void pc_init1(QEMUMachineInitArgs *args,
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MemoryRegion *system_io,
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ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model,
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int pci_enabled,
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int pci_enabled,
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int kvmclock_enabled)
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int kvmclock_enabled)
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{
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{
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MemoryRegion *system_memory = get_system_memory();
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MemoryRegion *system_io = get_system_io();
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int i;
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int i;
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ram_addr_t below_4g_mem_size, above_4g_mem_size;
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ram_addr_t below_4g_mem_size, above_4g_mem_size;
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PCIBus *pci_bus;
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PCIBus *pci_bus;
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@ -102,18 +98,18 @@ static void pc_init1(MemoryRegion *system_memory,
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object_property_add_child(qdev_get_machine(), "icc-bridge",
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object_property_add_child(qdev_get_machine(), "icc-bridge",
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OBJECT(icc_bridge), NULL);
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OBJECT(icc_bridge), NULL);
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pc_cpus_init(cpu_model, icc_bridge);
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pc_cpus_init(args->cpu_model, icc_bridge);
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if (kvm_enabled() && kvmclock_enabled) {
|
if (kvm_enabled() && kvmclock_enabled) {
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kvmclock_create();
|
kvmclock_create();
|
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}
|
}
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|
|
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if (ram_size >= 0xe0000000 ) {
|
if (args->ram_size >= 0xe0000000) {
|
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above_4g_mem_size = ram_size - 0xe0000000;
|
above_4g_mem_size = args->ram_size - 0xe0000000;
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below_4g_mem_size = 0xe0000000;
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below_4g_mem_size = 0xe0000000;
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} else {
|
} else {
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above_4g_mem_size = 0;
|
above_4g_mem_size = 0;
|
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below_4g_mem_size = ram_size;
|
below_4g_mem_size = args->ram_size;
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}
|
}
|
||||||
|
|
||||||
if (pci_enabled) {
|
if (pci_enabled) {
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||||||
|
@ -132,7 +128,8 @@ static void pc_init1(MemoryRegion *system_memory,
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/* allocate ram and load rom/bios */
|
/* allocate ram and load rom/bios */
|
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if (!xen_enabled()) {
|
if (!xen_enabled()) {
|
||||||
fw_cfg = pc_memory_init(system_memory,
|
fw_cfg = pc_memory_init(system_memory,
|
||||||
kernel_filename, kernel_cmdline, initrd_filename,
|
args->kernel_filename, args->kernel_cmdline,
|
||||||
|
args->initrd_filename,
|
||||||
below_4g_mem_size, above_4g_mem_size,
|
below_4g_mem_size, above_4g_mem_size,
|
||||||
rom_memory, &ram_memory, guest_info);
|
rom_memory, &ram_memory, guest_info);
|
||||||
}
|
}
|
||||||
|
@ -148,7 +145,7 @@ static void pc_init1(MemoryRegion *system_memory,
|
||||||
|
|
||||||
if (pci_enabled) {
|
if (pci_enabled) {
|
||||||
pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
|
pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
|
||||||
system_memory, system_io, ram_size,
|
system_memory, system_io, args->ram_size,
|
||||||
below_4g_mem_size,
|
below_4g_mem_size,
|
||||||
0x100000000ULL - below_4g_mem_size,
|
0x100000000ULL - below_4g_mem_size,
|
||||||
above_4g_mem_size,
|
above_4g_mem_size,
|
||||||
|
@ -207,7 +204,7 @@ static void pc_init1(MemoryRegion *system_memory,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
|
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_device,
|
||||||
floppy, idebus[0], idebus[1], rtc_state);
|
floppy, idebus[0], idebus[1], rtc_state);
|
||||||
|
|
||||||
if (pci_enabled && usb_enabled(false)) {
|
if (pci_enabled && usb_enabled(false)) {
|
||||||
|
@ -236,95 +233,91 @@ static void pc_init1(MemoryRegion *system_memory,
|
||||||
|
|
||||||
static void pc_init_pci(QEMUMachineInitArgs *args)
|
static void pc_init_pci(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t ram_size = args->ram_size;
|
pc_init1(args, 1, 1);
|
||||||
const char *cpu_model = args->cpu_model;
|
}
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
static void pc_compat_1_6(QEMUMachineInitArgs *args)
|
||||||
const char *initrd_filename = args->initrd_filename;
|
{
|
||||||
const char *boot_device = args->boot_device;
|
has_pci_info = false;
|
||||||
pc_init1(get_system_memory(),
|
rom_file_in_ram = false;
|
||||||
get_system_io(),
|
}
|
||||||
ram_size, boot_device,
|
|
||||||
kernel_filename, kernel_cmdline,
|
static void pc_compat_1_5(QEMUMachineInitArgs *args)
|
||||||
initrd_filename, cpu_model, 1, 1);
|
{
|
||||||
|
pc_compat_1_6(args);
|
||||||
|
has_pvpanic = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void pc_compat_1_4(QEMUMachineInitArgs *args)
|
||||||
|
{
|
||||||
|
pc_compat_1_5(args);
|
||||||
|
has_pvpanic = false;
|
||||||
|
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
|
||||||
|
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void pc_compat_1_3(QEMUMachineInitArgs *args)
|
||||||
|
{
|
||||||
|
pc_compat_1_4(args);
|
||||||
|
enable_compat_apic_id_mode();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* PC compat function for pc-0.14 to pc-1.2 */
|
||||||
|
static void pc_compat_1_2(QEMUMachineInitArgs *args)
|
||||||
|
{
|
||||||
|
pc_compat_1_3(args);
|
||||||
|
disable_kvm_pv_eoi();
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_pci_1_6(QEMUMachineInitArgs *args)
|
static void pc_init_pci_1_6(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
has_pci_info = false;
|
pc_compat_1_6(args);
|
||||||
pc_init_pci(args);
|
pc_init_pci(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_pci_1_5(QEMUMachineInitArgs *args)
|
static void pc_init_pci_1_5(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
has_pvpanic = true;
|
pc_compat_1_5(args);
|
||||||
pc_init_pci_1_6(args);
|
pc_init_pci(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_pci_1_4(QEMUMachineInitArgs *args)
|
static void pc_init_pci_1_4(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
|
pc_compat_1_4(args);
|
||||||
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
|
|
||||||
has_pci_info = false;
|
|
||||||
pc_init_pci(args);
|
pc_init_pci(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_pci_1_3(QEMUMachineInitArgs *args)
|
static void pc_init_pci_1_3(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
enable_compat_apic_id_mode();
|
pc_compat_1_3(args);
|
||||||
pc_init_pci_1_4(args);
|
pc_init_pci(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* PC machine init function for pc-1.1 to pc-1.2 */
|
/* PC machine init function for pc-0.14 to pc-1.2 */
|
||||||
static void pc_init_pci_1_2(QEMUMachineInitArgs *args)
|
static void pc_init_pci_1_2(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
disable_kvm_pv_eoi();
|
pc_compat_1_2(args);
|
||||||
pc_init_pci_1_3(args);
|
pc_init_pci(args);
|
||||||
}
|
|
||||||
|
|
||||||
/* PC machine init function for pc-0.14 to pc-1.0 */
|
|
||||||
static void pc_init_pci_1_0(QEMUMachineInitArgs *args)
|
|
||||||
{
|
|
||||||
pc_init_pci_1_2(args);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* PC init function for pc-0.10 to pc-0.13, and reused by xenfv */
|
/* PC init function for pc-0.10 to pc-0.13, and reused by xenfv */
|
||||||
static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args)
|
static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t ram_size = args->ram_size;
|
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
has_pci_info = false;
|
has_pci_info = false;
|
||||||
disable_kvm_pv_eoi();
|
disable_kvm_pv_eoi();
|
||||||
enable_compat_apic_id_mode();
|
enable_compat_apic_id_mode();
|
||||||
pc_init1(get_system_memory(),
|
pc_init1(args, 1, 0);
|
||||||
get_system_io(),
|
|
||||||
ram_size, boot_device,
|
|
||||||
kernel_filename, kernel_cmdline,
|
|
||||||
initrd_filename, cpu_model, 1, 0);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_init_isa(QEMUMachineInitArgs *args)
|
static void pc_init_isa(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t ram_size = args->ram_size;
|
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
has_pci_info = false;
|
has_pci_info = false;
|
||||||
if (cpu_model == NULL)
|
if (!args->cpu_model) {
|
||||||
cpu_model = "486";
|
args->cpu_model = "486";
|
||||||
|
}
|
||||||
disable_kvm_pv_eoi();
|
disable_kvm_pv_eoi();
|
||||||
enable_compat_apic_id_mode();
|
enable_compat_apic_id_mode();
|
||||||
pc_init1(get_system_memory(),
|
pc_init1(args, 0, 1);
|
||||||
get_system_io(),
|
|
||||||
ram_size, boot_device,
|
|
||||||
kernel_filename, kernel_cmdline,
|
|
||||||
initrd_filename, cpu_model, 0, 1);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_XEN
|
#ifdef CONFIG_XEN
|
||||||
|
@ -516,7 +509,7 @@ static QEMUMachine pc_machine_v1_1 = {
|
||||||
static QEMUMachine pc_machine_v1_0 = {
|
static QEMUMachine pc_machine_v1_0 = {
|
||||||
.name = "pc-1.0",
|
.name = "pc-1.0",
|
||||||
.desc = "Standard PC",
|
.desc = "Standard PC",
|
||||||
.init = pc_init_pci_1_0,
|
.init = pc_init_pci_1_2,
|
||||||
.max_cpus = 255,
|
.max_cpus = 255,
|
||||||
.compat_props = (GlobalProperty[]) {
|
.compat_props = (GlobalProperty[]) {
|
||||||
PC_COMPAT_1_0,
|
PC_COMPAT_1_0,
|
||||||
|
@ -532,7 +525,7 @@ static QEMUMachine pc_machine_v1_0 = {
|
||||||
static QEMUMachine pc_machine_v0_15 = {
|
static QEMUMachine pc_machine_v0_15 = {
|
||||||
.name = "pc-0.15",
|
.name = "pc-0.15",
|
||||||
.desc = "Standard PC",
|
.desc = "Standard PC",
|
||||||
.init = pc_init_pci_1_0,
|
.init = pc_init_pci_1_2,
|
||||||
.max_cpus = 255,
|
.max_cpus = 255,
|
||||||
.compat_props = (GlobalProperty[]) {
|
.compat_props = (GlobalProperty[]) {
|
||||||
PC_COMPAT_0_15,
|
PC_COMPAT_0_15,
|
||||||
|
@ -565,7 +558,7 @@ static QEMUMachine pc_machine_v0_15 = {
|
||||||
static QEMUMachine pc_machine_v0_14 = {
|
static QEMUMachine pc_machine_v0_14 = {
|
||||||
.name = "pc-0.14",
|
.name = "pc-0.14",
|
||||||
.desc = "Standard PC",
|
.desc = "Standard PC",
|
||||||
.init = pc_init_pci_1_0,
|
.init = pc_init_pci_1_2,
|
||||||
.max_cpus = 255,
|
.max_cpus = 255,
|
||||||
.compat_props = (GlobalProperty[]) {
|
.compat_props = (GlobalProperty[]) {
|
||||||
PC_COMPAT_0_14,
|
PC_COMPAT_0_14,
|
||||||
|
|
|
@ -28,6 +28,7 @@
|
||||||
* THE SOFTWARE.
|
* THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
#include "hw/hw.h"
|
#include "hw/hw.h"
|
||||||
|
#include "hw/loader.h"
|
||||||
#include "sysemu/arch_init.h"
|
#include "sysemu/arch_init.h"
|
||||||
#include "hw/i2c/smbus.h"
|
#include "hw/i2c/smbus.h"
|
||||||
#include "hw/boards.h"
|
#include "hw/boards.h"
|
||||||
|
@ -52,12 +53,6 @@ static bool has_pci_info = true;
|
||||||
/* PC hardware initialisation */
|
/* PC hardware initialisation */
|
||||||
static void pc_q35_init(QEMUMachineInitArgs *args)
|
static void pc_q35_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t ram_size = args->ram_size;
|
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
ram_addr_t below_4g_mem_size, above_4g_mem_size;
|
ram_addr_t below_4g_mem_size, above_4g_mem_size;
|
||||||
Q35PCIHost *q35_host;
|
Q35PCIHost *q35_host;
|
||||||
PCIHostState *phb;
|
PCIHostState *phb;
|
||||||
|
@ -85,17 +80,17 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
|
||||||
object_property_add_child(qdev_get_machine(), "icc-bridge",
|
object_property_add_child(qdev_get_machine(), "icc-bridge",
|
||||||
OBJECT(icc_bridge), NULL);
|
OBJECT(icc_bridge), NULL);
|
||||||
|
|
||||||
pc_cpus_init(cpu_model, icc_bridge);
|
pc_cpus_init(args->cpu_model, icc_bridge);
|
||||||
pc_acpi_init("q35-acpi-dsdt.aml");
|
pc_acpi_init("q35-acpi-dsdt.aml");
|
||||||
|
|
||||||
kvmclock_create();
|
kvmclock_create();
|
||||||
|
|
||||||
if (ram_size >= 0xb0000000) {
|
if (args->ram_size >= 0xb0000000) {
|
||||||
above_4g_mem_size = ram_size - 0xb0000000;
|
above_4g_mem_size = args->ram_size - 0xb0000000;
|
||||||
below_4g_mem_size = 0xb0000000;
|
below_4g_mem_size = 0xb0000000;
|
||||||
} else {
|
} else {
|
||||||
above_4g_mem_size = 0;
|
above_4g_mem_size = 0;
|
||||||
below_4g_mem_size = ram_size;
|
below_4g_mem_size = args->ram_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* pci enabled */
|
/* pci enabled */
|
||||||
|
@ -114,8 +109,10 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
|
||||||
|
|
||||||
/* allocate ram and load rom/bios */
|
/* allocate ram and load rom/bios */
|
||||||
if (!xen_enabled()) {
|
if (!xen_enabled()) {
|
||||||
pc_memory_init(get_system_memory(), kernel_filename, kernel_cmdline,
|
pc_memory_init(get_system_memory(),
|
||||||
initrd_filename, below_4g_mem_size, above_4g_mem_size,
|
args->kernel_filename, args->kernel_cmdline,
|
||||||
|
args->initrd_filename,
|
||||||
|
below_4g_mem_size, above_4g_mem_size,
|
||||||
rom_memory, &ram_memory, guest_info);
|
rom_memory, &ram_memory, guest_info);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -203,7 +200,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
|
||||||
0xb100),
|
0xb100),
|
||||||
8, NULL, 0);
|
8, NULL, 0);
|
||||||
|
|
||||||
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
|
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_device,
|
||||||
floppy, idebus[0], idebus[1], rtc_state);
|
floppy, idebus[0], idebus[1], rtc_state);
|
||||||
|
|
||||||
/* the rest devices to which pci devfn is automatically assigned */
|
/* the rest devices to which pci devfn is automatically assigned */
|
||||||
|
@ -218,23 +215,41 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
|
static void pc_compat_1_6(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
has_pci_info = false;
|
has_pci_info = false;
|
||||||
|
rom_file_in_ram = false;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void pc_compat_1_5(QEMUMachineInitArgs *args)
|
||||||
|
{
|
||||||
|
pc_compat_1_6(args);
|
||||||
|
has_pvpanic = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void pc_compat_1_4(QEMUMachineInitArgs *args)
|
||||||
|
{
|
||||||
|
pc_compat_1_5(args);
|
||||||
|
has_pvpanic = false;
|
||||||
|
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
|
||||||
|
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
|
||||||
|
{
|
||||||
|
pc_compat_1_6(args);
|
||||||
pc_q35_init(args);
|
pc_q35_init(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_q35_init_1_5(QEMUMachineInitArgs *args)
|
static void pc_q35_init_1_5(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
has_pvpanic = true;
|
pc_compat_1_5(args);
|
||||||
pc_q35_init_1_6(args);
|
pc_q35_init(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
|
static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
|
pc_compat_1_4(args);
|
||||||
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
|
|
||||||
has_pci_info = false;
|
|
||||||
pc_q35_init(args);
|
pc_q35_init(args);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -124,13 +124,14 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ppce500_load_device_tree(CPUPPCState *env,
|
static int ppce500_load_device_tree(CPUPPCState *env,
|
||||||
|
QEMUMachineInitArgs *args,
|
||||||
PPCE500Params *params,
|
PPCE500Params *params,
|
||||||
hwaddr addr,
|
hwaddr addr,
|
||||||
hwaddr initrd_base,
|
hwaddr initrd_base,
|
||||||
hwaddr initrd_size)
|
hwaddr initrd_size)
|
||||||
{
|
{
|
||||||
int ret = -1;
|
int ret = -1;
|
||||||
uint64_t mem_reg_property[] = { 0, cpu_to_be64(params->ram_size) };
|
uint64_t mem_reg_property[] = { 0, cpu_to_be64(args->ram_size) };
|
||||||
int fdt_size;
|
int fdt_size;
|
||||||
void *fdt;
|
void *fdt;
|
||||||
uint8_t hypercall[16];
|
uint8_t hypercall[16];
|
||||||
|
@ -205,7 +206,7 @@ static int ppce500_load_device_tree(CPUPPCState *env,
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
|
ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
|
||||||
params->kernel_cmdline);
|
args->kernel_cmdline);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
fprintf(stderr, "couldn't set /chosen/bootargs\n");
|
fprintf(stderr, "couldn't set /chosen/bootargs\n");
|
||||||
|
|
||||||
|
@ -559,7 +560,7 @@ static qemu_irq *ppce500_init_mpic(PPCE500Params *params, MemoryRegion *ccsr,
|
||||||
return mpic;
|
return mpic;
|
||||||
}
|
}
|
||||||
|
|
||||||
void ppce500_init(PPCE500Params *params)
|
void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
|
||||||
{
|
{
|
||||||
MemoryRegion *address_space_mem = get_system_memory();
|
MemoryRegion *address_space_mem = get_system_memory();
|
||||||
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
||||||
|
@ -584,8 +585,8 @@ void ppce500_init(PPCE500Params *params)
|
||||||
PPCE500CCSRState *ccsr;
|
PPCE500CCSRState *ccsr;
|
||||||
|
|
||||||
/* Setup CPUs */
|
/* Setup CPUs */
|
||||||
if (params->cpu_model == NULL) {
|
if (args->cpu_model == NULL) {
|
||||||
params->cpu_model = "e500v2_v30";
|
args->cpu_model = "e500v2_v30";
|
||||||
}
|
}
|
||||||
|
|
||||||
irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
|
irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
|
||||||
|
@ -595,7 +596,7 @@ void ppce500_init(PPCE500Params *params)
|
||||||
CPUState *cs;
|
CPUState *cs;
|
||||||
qemu_irq *input;
|
qemu_irq *input;
|
||||||
|
|
||||||
cpu = cpu_ppc_init(params->cpu_model);
|
cpu = cpu_ppc_init(args->cpu_model);
|
||||||
if (cpu == NULL) {
|
if (cpu == NULL) {
|
||||||
fprintf(stderr, "Unable to initialize CPU!\n");
|
fprintf(stderr, "Unable to initialize CPU!\n");
|
||||||
exit(1);
|
exit(1);
|
||||||
|
@ -634,7 +635,7 @@ void ppce500_init(PPCE500Params *params)
|
||||||
|
|
||||||
/* Fixup Memory size on a alignment boundary */
|
/* Fixup Memory size on a alignment boundary */
|
||||||
ram_size &= ~(RAM_SIZES_ALIGN - 1);
|
ram_size &= ~(RAM_SIZES_ALIGN - 1);
|
||||||
params->ram_size = ram_size;
|
args->ram_size = ram_size;
|
||||||
|
|
||||||
/* Register Memory */
|
/* Register Memory */
|
||||||
memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
|
memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
|
||||||
|
@ -701,11 +702,11 @@ void ppce500_init(PPCE500Params *params)
|
||||||
sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
|
sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
|
||||||
|
|
||||||
/* Load kernel. */
|
/* Load kernel. */
|
||||||
if (params->kernel_filename) {
|
if (args->kernel_filename) {
|
||||||
kernel_size = load_uimage(params->kernel_filename, &entry,
|
kernel_size = load_uimage(args->kernel_filename, &entry,
|
||||||
&loadaddr, NULL);
|
&loadaddr, NULL);
|
||||||
if (kernel_size < 0) {
|
if (kernel_size < 0) {
|
||||||
kernel_size = load_elf(params->kernel_filename, NULL, NULL,
|
kernel_size = load_elf(args->kernel_filename, NULL, NULL,
|
||||||
&elf_entry, &elf_lowaddr, NULL, 1,
|
&elf_entry, &elf_lowaddr, NULL, 1,
|
||||||
ELF_MACHINE, 0);
|
ELF_MACHINE, 0);
|
||||||
entry = elf_entry;
|
entry = elf_entry;
|
||||||
|
@ -714,7 +715,7 @@ void ppce500_init(PPCE500Params *params)
|
||||||
/* XXX try again as binary */
|
/* XXX try again as binary */
|
||||||
if (kernel_size < 0) {
|
if (kernel_size < 0) {
|
||||||
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
||||||
params->kernel_filename);
|
args->kernel_filename);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -726,14 +727,14 @@ void ppce500_init(PPCE500Params *params)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Load initrd. */
|
/* Load initrd. */
|
||||||
if (params->initrd_filename) {
|
if (args->initrd_filename) {
|
||||||
initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
|
initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
|
||||||
initrd_size = load_image_targphys(params->initrd_filename, initrd_base,
|
initrd_size = load_image_targphys(args->initrd_filename, initrd_base,
|
||||||
ram_size - initrd_base);
|
ram_size - initrd_base);
|
||||||
|
|
||||||
if (initrd_size < 0) {
|
if (initrd_size < 0) {
|
||||||
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
||||||
params->initrd_filename);
|
args->initrd_filename);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -741,12 +742,12 @@ void ppce500_init(PPCE500Params *params)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If we're loading a kernel directly, we must load the device tree too. */
|
/* If we're loading a kernel directly, we must load the device tree too. */
|
||||||
if (params->kernel_filename) {
|
if (args->kernel_filename) {
|
||||||
struct boot_info *boot_info;
|
struct boot_info *boot_info;
|
||||||
int dt_size;
|
int dt_size;
|
||||||
|
|
||||||
dt_size = ppce500_load_device_tree(env, params, dt_base, initrd_base,
|
dt_size = ppce500_load_device_tree(env, args, params, dt_base,
|
||||||
initrd_size);
|
initrd_base, initrd_size);
|
||||||
if (dt_size < 0) {
|
if (dt_size < 0) {
|
||||||
fprintf(stderr, "couldn't load device tree\n");
|
fprintf(stderr, "couldn't load device tree\n");
|
||||||
exit(1);
|
exit(1);
|
||||||
|
|
|
@ -1,25 +1,18 @@
|
||||||
#ifndef PPCE500_H
|
#ifndef PPCE500_H
|
||||||
#define PPCE500_H
|
#define PPCE500_H
|
||||||
|
|
||||||
|
#include "hw/boards.h"
|
||||||
|
|
||||||
typedef struct PPCE500Params {
|
typedef struct PPCE500Params {
|
||||||
/* Standard QEMU machine init params */
|
|
||||||
ram_addr_t ram_size;
|
|
||||||
const char *boot_device;
|
|
||||||
const char *kernel_filename;
|
|
||||||
const char *kernel_cmdline;
|
|
||||||
const char *initrd_filename;
|
|
||||||
const char *cpu_model;
|
|
||||||
int pci_first_slot;
|
int pci_first_slot;
|
||||||
int pci_nr_slots;
|
int pci_nr_slots;
|
||||||
|
|
||||||
/* e500-specific params */
|
|
||||||
|
|
||||||
/* required -- must at least add toplevel board compatible */
|
/* required -- must at least add toplevel board compatible */
|
||||||
void (*fixup_devtree)(struct PPCE500Params *params, void *fdt);
|
void (*fixup_devtree)(struct PPCE500Params *params, void *fdt);
|
||||||
|
|
||||||
int mpic_version;
|
int mpic_version;
|
||||||
} PPCE500Params;
|
} PPCE500Params;
|
||||||
|
|
||||||
void ppce500_init(PPCE500Params *params);
|
void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -30,19 +30,7 @@ static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt)
|
||||||
|
|
||||||
static void e500plat_init(QEMUMachineInitArgs *args)
|
static void e500plat_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t ram_size = args->ram_size;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
PPCE500Params params = {
|
PPCE500Params params = {
|
||||||
.ram_size = ram_size,
|
|
||||||
.boot_device = boot_device,
|
|
||||||
.kernel_filename = kernel_filename,
|
|
||||||
.kernel_cmdline = kernel_cmdline,
|
|
||||||
.initrd_filename = initrd_filename,
|
|
||||||
.cpu_model = cpu_model,
|
|
||||||
.pci_first_slot = 0x1,
|
.pci_first_slot = 0x1,
|
||||||
.pci_nr_slots = PCI_SLOT_MAX - 1,
|
.pci_nr_slots = PCI_SLOT_MAX - 1,
|
||||||
.fixup_devtree = e500plat_fixup_devtree,
|
.fixup_devtree = e500plat_fixup_devtree,
|
||||||
|
@ -55,7 +43,7 @@ static void e500plat_init(QEMUMachineInitArgs *args)
|
||||||
params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
|
params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
|
||||||
}
|
}
|
||||||
|
|
||||||
ppce500_init(¶ms);
|
ppce500_init(args, ¶ms);
|
||||||
}
|
}
|
||||||
|
|
||||||
static QEMUMachine e500plat_machine = {
|
static QEMUMachine e500plat_machine = {
|
||||||
|
|
|
@ -28,26 +28,14 @@ static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt)
|
||||||
|
|
||||||
static void mpc8544ds_init(QEMUMachineInitArgs *args)
|
static void mpc8544ds_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t ram_size = args->ram_size;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
PPCE500Params params = {
|
PPCE500Params params = {
|
||||||
.ram_size = ram_size,
|
|
||||||
.boot_device = boot_device,
|
|
||||||
.kernel_filename = kernel_filename,
|
|
||||||
.kernel_cmdline = kernel_cmdline,
|
|
||||||
.initrd_filename = initrd_filename,
|
|
||||||
.cpu_model = cpu_model,
|
|
||||||
.pci_first_slot = 0x11,
|
.pci_first_slot = 0x11,
|
||||||
.pci_nr_slots = 2,
|
.pci_nr_slots = 2,
|
||||||
.fixup_devtree = mpc8544ds_fixup_devtree,
|
.fixup_devtree = mpc8544ds_fixup_devtree,
|
||||||
.mpic_version = OPENPIC_MODEL_FSL_MPIC_20,
|
.mpic_version = OPENPIC_MODEL_FSL_MPIC_20,
|
||||||
};
|
};
|
||||||
|
|
||||||
ppce500_init(¶ms);
|
ppce500_init(args, ¶ms);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
113
hw/sparc/sun4m.c
113
hw/sparc/sun4m.c
|
@ -836,12 +836,10 @@ static void dummy_fdc_tc(void *opaque, int irq, int level)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
|
static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
|
||||||
const char *boot_device,
|
QEMUMachineInitArgs *args)
|
||||||
const char *kernel_filename,
|
|
||||||
const char *kernel_cmdline,
|
|
||||||
const char *initrd_filename, const char *cpu_model)
|
|
||||||
{
|
{
|
||||||
|
const char *cpu_model = args->cpu_model;
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
void *iommu, *espdma, *ledma, *nvram;
|
void *iommu, *espdma, *ledma, *nvram;
|
||||||
qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
|
qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
|
||||||
|
@ -867,10 +865,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
|
||||||
|
|
||||||
|
|
||||||
/* set up devices */
|
/* set up devices */
|
||||||
ram_init(0, RAM_size, hwdef->max_mem);
|
ram_init(0, args->ram_size, hwdef->max_mem);
|
||||||
/* models without ECC don't trap when missing ram is accessed */
|
/* models without ECC don't trap when missing ram is accessed */
|
||||||
if (!hwdef->ecc_base) {
|
if (!hwdef->ecc_base) {
|
||||||
empty_slot_init(RAM_size, hwdef->max_mem - RAM_size);
|
empty_slot_init(args->ram_size, hwdef->max_mem - args->ram_size);
|
||||||
}
|
}
|
||||||
|
|
||||||
prom_init(hwdef->slavio_base, bios_name);
|
prom_init(hwdef->slavio_base, bios_name);
|
||||||
|
@ -993,11 +991,12 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
|
||||||
empty_slot_init(hwdef->bpp_base, 0x20);
|
empty_slot_init(hwdef->bpp_base, 0x20);
|
||||||
}
|
}
|
||||||
|
|
||||||
kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename,
|
kernel_size = sun4m_load_kernel(args->kernel_filename,
|
||||||
RAM_size);
|
args->initrd_filename,
|
||||||
|
args->ram_size);
|
||||||
|
|
||||||
nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
|
nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, args->kernel_cmdline,
|
||||||
boot_device, RAM_size, kernel_size, graphic_width,
|
args->boot_device, args->ram_size, kernel_size, graphic_width,
|
||||||
graphic_height, graphic_depth, hwdef->nvram_machine_id,
|
graphic_height, graphic_depth, hwdef->nvram_machine_id,
|
||||||
"Sun4m");
|
"Sun4m");
|
||||||
|
|
||||||
|
@ -1015,19 +1014,20 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_HEIGHT, graphic_height);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_HEIGHT, graphic_height);
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
|
||||||
if (kernel_cmdline) {
|
if (args->kernel_cmdline) {
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
|
||||||
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
|
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE,
|
||||||
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline);
|
args->kernel_cmdline);
|
||||||
|
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, args->kernel_cmdline);
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
|
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
|
||||||
strlen(kernel_cmdline) + 1);
|
strlen(args->kernel_cmdline) + 1);
|
||||||
} else {
|
} else {
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
|
||||||
}
|
}
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
|
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, args->boot_device[0]);
|
||||||
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
|
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1291,118 +1291,55 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
|
||||||
/* SPARCstation 5 hardware initialisation */
|
/* SPARCstation 5 hardware initialisation */
|
||||||
static void ss5_init(QEMUMachineInitArgs *args)
|
static void ss5_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[0], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 10 hardware initialisation */
|
/* SPARCstation 10 hardware initialisation */
|
||||||
static void ss10_init(QEMUMachineInitArgs *args)
|
static void ss10_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[1], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCserver 600MP hardware initialisation */
|
/* SPARCserver 600MP hardware initialisation */
|
||||||
static void ss600mp_init(QEMUMachineInitArgs *args)
|
static void ss600mp_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[2], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 20 hardware initialisation */
|
/* SPARCstation 20 hardware initialisation */
|
||||||
static void ss20_init(QEMUMachineInitArgs *args)
|
static void ss20_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[3], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation Voyager hardware initialisation */
|
/* SPARCstation Voyager hardware initialisation */
|
||||||
static void vger_init(QEMUMachineInitArgs *args)
|
static void vger_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[4], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation LX hardware initialisation */
|
/* SPARCstation LX hardware initialisation */
|
||||||
static void ss_lx_init(QEMUMachineInitArgs *args)
|
static void ss_lx_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[5], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCstation 4 hardware initialisation */
|
/* SPARCstation 4 hardware initialisation */
|
||||||
static void ss4_init(QEMUMachineInitArgs *args)
|
static void ss4_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[6], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCClassic hardware initialisation */
|
/* SPARCClassic hardware initialisation */
|
||||||
static void scls_init(QEMUMachineInitArgs *args)
|
static void scls_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[7], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* SPARCbook hardware initialisation */
|
/* SPARCbook hardware initialisation */
|
||||||
static void sbook_init(QEMUMachineInitArgs *args)
|
static void sbook_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4m_hw_init(&sun4m_hwdefs[8], args);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_device = args->boot_device;
|
|
||||||
sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static QEMUMachine ss5_machine = {
|
static QEMUMachine ss5_machine = {
|
||||||
|
|
|
@ -811,10 +811,7 @@ static SPARCCPU *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sun4uv_init(MemoryRegion *address_space_mem,
|
static void sun4uv_init(MemoryRegion *address_space_mem,
|
||||||
ram_addr_t RAM_size,
|
QEMUMachineInitArgs *args,
|
||||||
const char *boot_devices,
|
|
||||||
const char *kernel_filename, const char *kernel_cmdline,
|
|
||||||
const char *initrd_filename, const char *cpu_model,
|
|
||||||
const struct hwdef *hwdef)
|
const struct hwdef *hwdef)
|
||||||
{
|
{
|
||||||
SPARCCPU *cpu;
|
SPARCCPU *cpu;
|
||||||
|
@ -829,10 +826,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
|
||||||
FWCfgState *fw_cfg;
|
FWCfgState *fw_cfg;
|
||||||
|
|
||||||
/* init CPUs */
|
/* init CPUs */
|
||||||
cpu = cpu_devinit(cpu_model, hwdef);
|
cpu = cpu_devinit(args->cpu_model, hwdef);
|
||||||
|
|
||||||
/* set up devices */
|
/* set up devices */
|
||||||
ram_init(0, RAM_size);
|
ram_init(0, args->ram_size);
|
||||||
|
|
||||||
prom_init(hwdef->prom_addr, bios_name);
|
prom_init(hwdef->prom_addr, bios_name);
|
||||||
|
|
||||||
|
@ -878,13 +875,15 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
|
||||||
|
|
||||||
initrd_size = 0;
|
initrd_size = 0;
|
||||||
initrd_addr = 0;
|
initrd_addr = 0;
|
||||||
kernel_size = sun4u_load_kernel(kernel_filename, initrd_filename,
|
kernel_size = sun4u_load_kernel(args->kernel_filename,
|
||||||
|
args->initrd_filename,
|
||||||
ram_size, &initrd_size, &initrd_addr,
|
ram_size, &initrd_size, &initrd_addr,
|
||||||
&kernel_addr, &kernel_entry);
|
&kernel_addr, &kernel_entry);
|
||||||
|
|
||||||
sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", RAM_size, boot_devices,
|
sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", args->ram_size,
|
||||||
|
args->boot_device,
|
||||||
kernel_addr, kernel_size,
|
kernel_addr, kernel_size,
|
||||||
kernel_cmdline,
|
args->kernel_cmdline,
|
||||||
initrd_addr, initrd_size,
|
initrd_addr, initrd_size,
|
||||||
/* XXX: need an option to load a NVRAM image */
|
/* XXX: need an option to load a NVRAM image */
|
||||||
0,
|
0,
|
||||||
|
@ -898,16 +897,16 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
|
||||||
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_entry);
|
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_entry);
|
||||||
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
|
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
|
||||||
if (kernel_cmdline) {
|
if (args->kernel_cmdline) {
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
|
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
|
||||||
strlen(kernel_cmdline) + 1);
|
strlen(args->kernel_cmdline) + 1);
|
||||||
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline);
|
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, args->kernel_cmdline);
|
||||||
} else {
|
} else {
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0);
|
||||||
}
|
}
|
||||||
fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
|
fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
|
||||||
fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
|
fw_cfg_add_i64(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_devices[0]);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, args->boot_device[0]);
|
||||||
|
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_WIDTH, graphic_width);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_WIDTH, graphic_width);
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_HEIGHT, graphic_height);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_SPARC64_HEIGHT, graphic_height);
|
||||||
|
@ -949,40 +948,19 @@ static const struct hwdef hwdefs[] = {
|
||||||
/* Sun4u hardware initialisation */
|
/* Sun4u hardware initialisation */
|
||||||
static void sun4u_init(QEMUMachineInitArgs *args)
|
static void sun4u_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4uv_init(get_system_memory(), args, &hwdefs[0]);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_devices = args->boot_device;
|
|
||||||
sun4uv_init(get_system_memory(), RAM_size, boot_devices, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Sun4v hardware initialisation */
|
/* Sun4v hardware initialisation */
|
||||||
static void sun4v_init(QEMUMachineInitArgs *args)
|
static void sun4v_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4uv_init(get_system_memory(), args, &hwdefs[1]);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_devices = args->boot_device;
|
|
||||||
sun4uv_init(get_system_memory(), RAM_size, boot_devices, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Niagara hardware initialisation */
|
/* Niagara hardware initialisation */
|
||||||
static void niagara_init(QEMUMachineInitArgs *args)
|
static void niagara_init(QEMUMachineInitArgs *args)
|
||||||
{
|
{
|
||||||
ram_addr_t RAM_size = args->ram_size;
|
sun4uv_init(get_system_memory(), args, &hwdefs[2]);
|
||||||
const char *cpu_model = args->cpu_model;
|
|
||||||
const char *kernel_filename = args->kernel_filename;
|
|
||||||
const char *kernel_cmdline = args->kernel_cmdline;
|
|
||||||
const char *initrd_filename = args->initrd_filename;
|
|
||||||
const char *boot_devices = args->boot_device;
|
|
||||||
sun4uv_init(get_system_memory(), RAM_size, boot_devices, kernel_filename,
|
|
||||||
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static QEMUMachine sun4u_machine = {
|
static QEMUMachine sun4u_machine = {
|
||||||
|
|
|
@ -377,8 +377,8 @@ void virtqueue_get_avail_bytes(VirtQueue *vq, unsigned int *in_bytes,
|
||||||
/* loop over the indirect descriptor table */
|
/* loop over the indirect descriptor table */
|
||||||
indirect = 1;
|
indirect = 1;
|
||||||
max = vring_desc_len(desc_pa, i) / sizeof(VRingDesc);
|
max = vring_desc_len(desc_pa, i) / sizeof(VRingDesc);
|
||||||
num_bufs = i = 0;
|
|
||||||
desc_pa = vring_desc_addr(desc_pa, i);
|
desc_pa = vring_desc_addr(desc_pa, i);
|
||||||
|
num_bufs = i = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
do {
|
do {
|
||||||
|
|
|
@ -36,6 +36,7 @@ void pstrcpy_targphys(const char *name,
|
||||||
hwaddr dest, int buf_size,
|
hwaddr dest, int buf_size,
|
||||||
const char *source);
|
const char *source);
|
||||||
|
|
||||||
|
extern bool rom_file_in_ram;
|
||||||
|
|
||||||
int rom_add_file(const char *file, const char *fw_dir,
|
int rom_add_file(const char *file, const char *fw_dir,
|
||||||
hwaddr addr, int32_t bootindex);
|
hwaddr addr, int32_t bootindex);
|
||||||
|
|
Loading…
Reference in a new issue