nvme: fix NSSRS offset in CAP register
Fix the offset of the NSSRS field the CAP register. From NVME 1.4, section 3 ("Controller Registers"), subsection 3.1.1 ("Offset 0h: CAP – Controller Capabilities") CAP_NSSRS_SHIFT is bit 36, not 33. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reported-by: Javier Gonzalez <javier.gonz@samsung.com> Message-id: 20191023073315.446534-1-its@irrelevant.dk Reviewed-by: John Snow <jsnow@redhat.com> [mreitz: Added John's note on the location in the specification where this information can be found] Signed-off-by: Max Reitz <mreitz@redhat.com>
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@ -23,7 +23,7 @@ enum NvmeCapShift {
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CAP_AMS_SHIFT = 17,
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CAP_TO_SHIFT = 24,
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CAP_DSTRD_SHIFT = 32,
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CAP_NSSRS_SHIFT = 33,
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CAP_NSSRS_SHIFT = 36,
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CAP_CSS_SHIFT = 37,
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CAP_MPSMIN_SHIFT = 48,
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CAP_MPSMAX_SHIFT = 52,
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