From 40e76f736d09535bc20e980a06c059229c7b5265 Mon Sep 17 00:00:00 2001 From: Peter Crosthwaite Date: Mon, 5 May 2014 21:39:38 -0700 Subject: [PATCH] net: xilinx_ethlite: Fix Rx-pong interrupt There is no CTRL_I bit in the pong buffer control register. The CTRL_I bit from the ping buffer masks both ping and pong buffers. Fix. Signed-off-by: Peter Crosthwaite Signed-off-by: Stefan Hajnoczi --- hw/net/xilinx_ethlite.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 5a434f642d..1b177b3dae 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -196,8 +196,9 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size); s->regs[rxbase + R_RX_CTRL0] |= CTRL_S; - if (s->regs[rxbase + R_RX_CTRL0] & CTRL_I) + if (s->regs[R_RX_CTRL0] & CTRL_I) { eth_pulse_irq(s); + } /* If c_rx_pingpong was set flip buffers. */ s->rxbuf ^= s->c_rx_pingpong;