hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) instead of fprintf
TCMI_VERBOSE is no more used, drop the OMAP_8/16/32B_REG macros. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-9-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -34,12 +34,18 @@
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#include "qemu/cutils.h"
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#include "qemu/cutils.h"
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#include "qemu/bcd.h"
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#include "qemu/bcd.h"
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static inline void omap_log_badwidth(const char *funcname, hwaddr addr, int sz)
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{
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qemu_log_mask(LOG_GUEST_ERROR, "%s: %d-bit register %#08" HWADDR_PRIx "\n",
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funcname, 8 * sz, addr);
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}
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/* Should signal the TCMI/GPMC */
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/* Should signal the TCMI/GPMC */
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uint32_t omap_badwidth_read8(void *opaque, hwaddr addr)
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uint32_t omap_badwidth_read8(void *opaque, hwaddr addr)
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{
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{
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uint8_t ret;
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uint8_t ret;
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OMAP_8B_REG(addr);
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omap_log_badwidth(__func__, addr, 1);
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cpu_physical_memory_read(addr, &ret, 1);
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cpu_physical_memory_read(addr, &ret, 1);
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return ret;
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return ret;
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}
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}
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@ -49,7 +55,7 @@ void omap_badwidth_write8(void *opaque, hwaddr addr,
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{
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{
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uint8_t val8 = value;
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uint8_t val8 = value;
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OMAP_8B_REG(addr);
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omap_log_badwidth(__func__, addr, 1);
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cpu_physical_memory_write(addr, &val8, 1);
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cpu_physical_memory_write(addr, &val8, 1);
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}
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}
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@ -57,7 +63,7 @@ uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
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{
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{
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uint16_t ret;
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uint16_t ret;
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OMAP_16B_REG(addr);
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omap_log_badwidth(__func__, addr, 2);
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cpu_physical_memory_read(addr, &ret, 2);
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cpu_physical_memory_read(addr, &ret, 2);
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return ret;
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return ret;
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}
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}
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@ -67,7 +73,7 @@ void omap_badwidth_write16(void *opaque, hwaddr addr,
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{
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{
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uint16_t val16 = value;
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uint16_t val16 = value;
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OMAP_16B_REG(addr);
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omap_log_badwidth(__func__, addr, 2);
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cpu_physical_memory_write(addr, &val16, 2);
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cpu_physical_memory_write(addr, &val16, 2);
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}
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}
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@ -75,7 +81,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
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{
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{
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uint32_t ret;
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uint32_t ret;
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OMAP_32B_REG(addr);
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omap_log_badwidth(__func__, addr, 4);
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cpu_physical_memory_read(addr, &ret, 4);
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cpu_physical_memory_read(addr, &ret, 4);
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return ret;
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return ret;
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}
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}
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@ -83,7 +89,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
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void omap_badwidth_write32(void *opaque, hwaddr addr,
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void omap_badwidth_write32(void *opaque, hwaddr addr,
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uint32_t value)
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uint32_t value)
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{
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{
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OMAP_32B_REG(addr);
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omap_log_badwidth(__func__, addr, 4);
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cpu_physical_memory_write(addr, &value, 4);
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cpu_physical_memory_write(addr, &value, 4);
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}
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}
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@ -993,24 +993,6 @@ enum {
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#define OMAP_GPIOSW_INVERTED 0x0001
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#define OMAP_GPIOSW_INVERTED 0x0001
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#define OMAP_GPIOSW_OUTPUT 0x0002
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#define OMAP_GPIOSW_OUTPUT 0x0002
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# define TCMI_VERBOSE 1
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# ifdef TCMI_VERBOSE
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# define OMAP_8B_REG(paddr) \
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fprintf(stderr, "%s: 8-bit register " OMAP_FMT_plx "\n", \
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__func__, paddr)
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# define OMAP_16B_REG(paddr) \
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fprintf(stderr, "%s: 16-bit register " OMAP_FMT_plx "\n", \
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__func__, paddr)
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# define OMAP_32B_REG(paddr) \
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fprintf(stderr, "%s: 32-bit register " OMAP_FMT_plx "\n", \
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__func__, paddr)
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# else
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# define OMAP_8B_REG(paddr)
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# define OMAP_16B_REG(paddr)
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# define OMAP_32B_REG(paddr)
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# endif
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# define OMAP_MPUI_REG_MASK 0x000007ff
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# define OMAP_MPUI_REG_MASK 0x000007ff
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#endif /* hw_omap_h */
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#endif /* hw_omap_h */
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