target/i386: kvm: initialize feature MSRs very early
Some read-only MSRs affect the behavior of ioctls such as KVM_SET_NESTED_STATE. We can initialize them once and for all right after the CPU is realized, since they will never be modified by the guest. Reported-by: Qingua Cheng <qcheng@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1579544504-3616-2-git-send-email-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -67,6 +67,8 @@
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* 255 kvm_msr_entry structs */
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#define MSR_BUF_SIZE 4096
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static void kvm_init_msrs(X86CPU *cpu);
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const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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KVM_CAP_INFO(SET_TSS_ADDR),
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KVM_CAP_INFO(EXT_CPUID),
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@ -1842,6 +1844,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
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has_msr_tsc_aux = false;
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}
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kvm_init_msrs(cpu);
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r = hyperv_init_vcpu(cpu);
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if (r) {
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goto fail;
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@ -2660,11 +2664,53 @@ static void kvm_msr_entry_add_vmx(X86CPU *cpu, FeatureWordArray f)
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VMCS12_MAX_FIELD_INDEX << 1);
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}
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static int kvm_buf_set_msrs(X86CPU *cpu)
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{
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int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf);
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if (ret < 0) {
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return ret;
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}
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if (ret < cpu->kvm_msr_buf->nmsrs) {
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struct kvm_msr_entry *e = &cpu->kvm_msr_buf->entries[ret];
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error_report("error: failed to set MSR 0x%" PRIx32 " to 0x%" PRIx64,
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(uint32_t)e->index, (uint64_t)e->data);
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}
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assert(ret == cpu->kvm_msr_buf->nmsrs);
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return 0;
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}
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static void kvm_init_msrs(X86CPU *cpu)
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{
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CPUX86State *env = &cpu->env;
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kvm_msr_buf_reset(cpu);
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if (has_msr_arch_capabs) {
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kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,
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env->features[FEAT_ARCH_CAPABILITIES]);
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}
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if (has_msr_core_capabs) {
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kvm_msr_entry_add(cpu, MSR_IA32_CORE_CAPABILITY,
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env->features[FEAT_CORE_CAPABILITY]);
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}
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/*
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* Older kernels do not include VMX MSRs in KVM_GET_MSR_INDEX_LIST, but
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* all kernels with MSR features should have them.
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*/
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if (kvm_feature_msrs && cpu_has_vmx(env)) {
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kvm_msr_entry_add_vmx(cpu, env->features);
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}
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assert(kvm_buf_set_msrs(cpu) == 0);
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}
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static int kvm_put_msrs(X86CPU *cpu, int level)
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{
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CPUX86State *env = &cpu->env;
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int i;
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int ret;
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kvm_msr_buf_reset(cpu);
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@ -2722,17 +2768,6 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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}
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#endif
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/* If host supports feature MSR, write down. */
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if (has_msr_arch_capabs) {
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kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,
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env->features[FEAT_ARCH_CAPABILITIES]);
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}
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if (has_msr_core_capabs) {
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kvm_msr_entry_add(cpu, MSR_IA32_CORE_CAPABILITY,
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env->features[FEAT_CORE_CAPABILITY]);
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}
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/*
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* The following MSRs have side effects on the guest or are too heavy
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* for normal writeback. Limit them to reset or full state updates.
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@ -2910,14 +2945,6 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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/* Note: MSR_IA32_FEATURE_CONTROL is written separately, see
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* kvm_put_msr_feature_control. */
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/*
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* Older kernels do not include VMX MSRs in KVM_GET_MSR_INDEX_LIST, but
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* all kernels with MSR features should have them.
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*/
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if (kvm_feature_msrs && cpu_has_vmx(env)) {
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kvm_msr_entry_add_vmx(cpu, env->features);
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}
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}
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if (env->mcg_cap) {
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@ -2933,19 +2960,7 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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}
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}
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ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf);
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if (ret < 0) {
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return ret;
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}
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if (ret < cpu->kvm_msr_buf->nmsrs) {
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struct kvm_msr_entry *e = &cpu->kvm_msr_buf->entries[ret];
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error_report("error: failed to set MSR 0x%" PRIx32 " to 0x%" PRIx64,
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(uint32_t)e->index, (uint64_t)e->data);
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}
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assert(ret == cpu->kvm_msr_buf->nmsrs);
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return 0;
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return kvm_buf_set_msrs(cpu);
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}
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@ -46,4 +46,5 @@ bool kvm_enable_x2apic(void);
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bool kvm_has_x2apic_api(void);
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bool kvm_hv_vpindex_settable(void);
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#endif
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