target-s390: Convert STCK
Signed-off-by: Richard Henderson <rth@twiddle.net>
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3528979951
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@ -84,7 +84,7 @@ DEF_HELPER_3(servc, i32, env, i32, i64)
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DEF_HELPER_4(diag, i64, env, i32, i64, i64)
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DEF_HELPER_4(diag, i64, env, i32, i64, i64)
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DEF_HELPER_3(load_psw, void, env, i64, i64)
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DEF_HELPER_3(load_psw, void, env, i64, i64)
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DEF_HELPER_FLAGS_2(spx, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_2(spx, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_2(stck, i32, env, i64)
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DEF_HELPER_FLAGS_1(stck, TCG_CALL_NO_RWG_SE, i64, env)
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DEF_HELPER_2(stcke, i32, env, i64)
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DEF_HELPER_2(stcke, i32, env, i64)
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DEF_HELPER_FLAGS_2(sckc, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_2(sckc, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_2(stckc, TCG_CALL_NO_RWG, void, env, i64)
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DEF_HELPER_FLAGS_2(stckc, TCG_CALL_NO_RWG, void, env, i64)
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@ -640,6 +640,9 @@
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C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0)
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C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0)
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/* SIGNAL PROCESSOR */
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/* SIGNAL PROCESSOR */
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C(0xae00, SIGP, RS_a, Z, r3_o, a2, 0, 0, sigp, 0)
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C(0xae00, SIGP, RS_a, Z, r3_o, a2, 0, 0, sigp, 0)
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/* STORE CLOCK */
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C(0xb205, STCK, S, Z, la2, 0, new, m1_64, stck, 0)
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C(0xb27c, STCKF, S, Z, la2, 0, new, m1_64, stck, 0)
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/* STORE CONTROL */
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/* STORE CONTROL */
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C(0xb600, STCTL, RS_a, Z, 0, a2, 0, 0, stctl, 0)
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C(0xb600, STCTL, RS_a, Z, 0, a2, 0, 0, stctl, 0)
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C(0xeb25, STCTG, RSY_a, Z, 0, a2, 0, 0, stctg, 0)
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C(0xeb25, STCTG, RSY_a, Z, 0, a2, 0, 0, stctg, 0)
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@ -154,11 +154,9 @@ static inline uint64_t clock_value(CPUS390XState *env)
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}
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}
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/* Store Clock */
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/* Store Clock */
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uint32_t HELPER(stck)(CPUS390XState *env, uint64_t a1)
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uint64_t HELPER(stck)(CPUS390XState *env)
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{
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{
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cpu_stq_data(env, a1, clock_value(env));
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return clock_value(env);
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return 0;
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}
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}
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/* Store Clock Extended */
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/* Store Clock Extended */
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@ -1033,15 +1033,6 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op,
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LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2);
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LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2);
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switch (op) {
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switch (op) {
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case 0x05: /* STCK D2(B2) [S] */
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/* Store Clock */
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decode_rs(s, insn, &r1, &r3, &b2, &d2);
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tmp = get_address(s, 0, b2, d2);
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potential_page_fault(s);
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gen_helper_stck(cc_op, cpu_env, tmp);
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set_cc_static(s);
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tcg_temp_free_i64(tmp);
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break;
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case 0x06: /* SCKC D2(B2) [S] */
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case 0x06: /* SCKC D2(B2) [S] */
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/* Set Clock Comparator */
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/* Set Clock Comparator */
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check_privileged(s);
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check_privileged(s);
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@ -2924,6 +2915,14 @@ static ExitStatus op_ssm(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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static ExitStatus op_stck(DisasContext *s, DisasOps *o)
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{
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gen_helper_stck(o->out, cpu_env);
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/* ??? We don't implement clock states. */
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gen_op_movi_cc(s, 0);
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return NO_EXIT;
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}
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static ExitStatus op_stctg(DisasContext *s, DisasOps *o)
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static ExitStatus op_stctg(DisasContext *s, DisasOps *o)
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{
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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