added PCI bus
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@961 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
7c29d0c0cf
commit
46e50e9d58
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@ -2891,7 +2891,7 @@ static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
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s->cirrus_mmio_io_addr);
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s->cirrus_mmio_io_addr);
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}
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}
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void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
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void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
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unsigned long vga_ram_offset, int vga_ram_size)
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unsigned long vga_ram_offset, int vga_ram_size)
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{
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{
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PCICirrusVGAState *d;
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PCICirrusVGAState *d;
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@ -2902,9 +2902,9 @@ void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
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device_id = CIRRUS_ID_CLGD5446;
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device_id = CIRRUS_ID_CLGD5446;
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/* setup PCI configuration registers */
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/* setup PCI configuration registers */
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d = (PCICirrusVGAState *)pci_register_device("Cirrus VGA",
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d = (PCICirrusVGAState *)pci_register_device(bus, "Cirrus VGA",
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sizeof(PCICirrusVGAState),
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sizeof(PCICirrusVGAState),
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0, -1, NULL, NULL);
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-1, NULL, NULL);
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pci_conf = d->dev.config;
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pci_conf = d->dev.config;
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pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
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pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
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pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);
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pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);
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13
hw/ide.c
13
hw/ide.c
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@ -1579,14 +1579,14 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
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}
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}
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/* hd_table must contain 4 block drivers */
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/* hd_table must contain 4 block drivers */
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void pci_ide_init(BlockDriverState **hd_table)
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void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
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{
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{
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PCIIDEState *d;
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PCIIDEState *d;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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int i;
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int i;
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d = (PCIIDEState *)pci_register_device("IDE", sizeof(PCIIDEState),
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d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
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0, -1,
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-1,
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NULL, NULL);
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NULL, NULL);
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pci_conf = d->dev.config;
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pci_conf = d->dev.config;
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pci_conf[0x00] = 0x86; // Intel
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pci_conf[0x00] = 0x86; // Intel
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@ -1621,14 +1621,15 @@ void pci_ide_init(BlockDriverState **hd_table)
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/* hd_table must contain 4 block drivers */
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/* hd_table must contain 4 block drivers */
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/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
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/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
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void pci_piix3_ide_init(BlockDriverState **hd_table)
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void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
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{
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{
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PCIIDEState *d;
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PCIIDEState *d;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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/* register a function 1 of PIIX3 */
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/* register a function 1 of PIIX3 */
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d = (PCIIDEState *)pci_register_device("PIIX3 IDE", sizeof(PCIIDEState),
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d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
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0, ((PCIDevice *)piix3_state)->devfn + 1,
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sizeof(PCIIDEState),
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((PCIDevice *)piix3_state)->devfn + 1,
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NULL, NULL);
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NULL, NULL);
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pci_conf = d->dev.config;
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pci_conf = d->dev.config;
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pci_conf[0x00] = 0x86; // Intel
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pci_conf[0x00] = 0x86; // Intel
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@ -613,14 +613,15 @@ static void ne2000_map(PCIDevice *pci_dev, int region_num,
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register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
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register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
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}
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}
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void pci_ne2000_init(NetDriverState *nd)
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void pci_ne2000_init(PCIBus *bus, NetDriverState *nd)
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{
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{
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PCINE2000State *d;
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PCINE2000State *d;
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NE2000State *s;
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NE2000State *s;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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d = (PCINE2000State *)pci_register_device("NE2000", sizeof(PCINE2000State),
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d = (PCINE2000State *)pci_register_device(bus,
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0, -1,
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"NE2000", sizeof(PCINE2000State),
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-1,
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NULL, NULL);
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NULL, NULL);
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pci_conf = d->dev.config;
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pci_conf = d->dev.config;
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pci_conf[0x00] = 0xec; // Realtek 8029
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pci_conf[0x00] = 0xec; // Realtek 8029
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@ -964,7 +964,8 @@ static void openpic_map(PCIDevice *pci_dev, int region_num,
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#endif
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#endif
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}
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}
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openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
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openpic_t *openpic_init (PCIBus *bus,
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uint32_t isu_base, uint32_t idu_base, int nb_cpus)
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{
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{
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openpic_t *opp;
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openpic_t *opp;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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@ -973,8 +974,8 @@ openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
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/* XXX: for now, only one CPU is supported */
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/* XXX: for now, only one CPU is supported */
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if (nb_cpus != 1)
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if (nb_cpus != 1)
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return NULL;
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return NULL;
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opp = (openpic_t *)pci_register_device("OpenPIC", sizeof(openpic_t),
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opp = (openpic_t *)pci_register_device(bus, "OpenPIC", sizeof(openpic_t),
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0, -1, NULL, NULL);
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-1, NULL, NULL);
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if (opp == NULL)
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if (opp == NULL)
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return NULL;
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return NULL;
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pci_conf = opp->pci_dev.config;
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pci_conf = opp->pci_dev.config;
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20
hw/pc.c
20
hw/pc.c
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@ -324,7 +324,8 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
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int ret, linux_boot, initrd_size, i, nb_nics1, fd;
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int ret, linux_boot, initrd_size, i, nb_nics1, fd;
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unsigned long bios_offset, vga_bios_offset;
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unsigned long bios_offset, vga_bios_offset;
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int bios_size, isa_bios_size;
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int bios_size, isa_bios_size;
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PCIBus *pci_bus;
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linux_boot = (kernel_filename != NULL);
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linux_boot = (kernel_filename != NULL);
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/* allocate RAM */
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/* allocate RAM */
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@ -432,8 +433,10 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
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}
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}
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if (pci_enabled) {
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if (pci_enabled) {
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i440fx_init();
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pci_bus = i440fx_init();
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piix3_init();
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piix3_init(pci_bus);
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} else {
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pci_bus = NULL;
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}
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}
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/* init basic PC hardware */
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/* init basic PC hardware */
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@ -443,15 +446,16 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
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if (cirrus_vga_enabled) {
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if (cirrus_vga_enabled) {
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if (pci_enabled) {
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if (pci_enabled) {
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pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
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pci_cirrus_vga_init(pci_bus,
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ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size);
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vga_ram_size);
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} else {
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} else {
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isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
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isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size);
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vga_ram_size);
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}
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}
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} else {
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} else {
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vga_initialize(ds, phys_ram_base + ram_size, ram_size,
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vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size, pci_enabled);
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vga_ram_size);
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}
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}
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rtc_state = rtc_init(0x70, 8);
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rtc_state = rtc_init(0x70, 8);
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@ -469,9 +473,9 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
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if (pci_enabled) {
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if (pci_enabled) {
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for(i = 0; i < nb_nics; i++) {
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for(i = 0; i < nb_nics; i++) {
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pci_ne2000_init(&nd_table[i]);
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pci_ne2000_init(pci_bus, &nd_table[i]);
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}
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}
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pci_piix3_ide_init(bs_table);
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pci_piix3_ide_init(pci_bus, bs_table);
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} else {
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} else {
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nb_nics1 = nb_nics;
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nb_nics1 = nb_nics;
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if (nb_nics1 > NE2000_NB_MAX)
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if (nb_nics1 > NE2000_NB_MAX)
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@ -89,13 +89,12 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
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cpu_register_physical_memory(addr + 0x20000, 0x1000, ide1_mem_index);
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cpu_register_physical_memory(addr + 0x20000, 0x1000, ide1_mem_index);
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}
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}
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static void macio_init(void)
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static void macio_init(PCIBus *bus)
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{
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{
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PCIDevice *d;
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PCIDevice *d;
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d = pci_register_device("macio", sizeof(PCIDevice),
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d = pci_register_device(bus, "macio", sizeof(PCIDevice),
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0, -1,
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-1, NULL, NULL);
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NULL, NULL);
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/* Note: this code is strongly inspirated from the corresponding code
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/* Note: this code is strongly inspirated from the corresponding code
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in PearPC */
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in PearPC */
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d->config[0x00] = 0x6b; // vendor_id
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d->config[0x00] = 0x6b; // vendor_id
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@ -128,7 +127,8 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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int ret, linux_boot, i, fd;
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int ret, linux_boot, i, fd;
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unsigned long bios_offset;
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unsigned long bios_offset;
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uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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PCIBus *pci_bus;
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linux_boot = (kernel_filename != NULL);
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linux_boot = (kernel_filename != NULL);
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/* allocate RAM */
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/* allocate RAM */
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@ -182,17 +182,18 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
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cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
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isa_mem_base = 0x80000000;
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isa_mem_base = 0x80000000;
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pci_pmac_init();
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pci_bus = pci_pmac_init();
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/* Register 8 MB of ISA IO space */
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/* Register 8 MB of ISA IO space */
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PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
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PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
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cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory);
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cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory);
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/* init basic PC hardware */
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/* init basic PC hardware */
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vga_initialize(ds, phys_ram_base + ram_size, ram_size,
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vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size, 1);
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vga_ram_size);
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openpic = openpic_init(0x00000000, 0xF0000000, 1);
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openpic = openpic_init(pci_bus, 0x00000000, 0xF0000000, 1);
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pci_pmac_set_openpic(pci_bus, openpic);
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/* XXX: suppress that */
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/* XXX: suppress that */
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pic_init();
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pic_init();
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@ -201,7 +202,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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serial_init(0x3f8, 4, fd);
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serial_init(0x3f8, 4, fd);
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for(i = 0; i < nb_nics; i++) {
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for(i = 0; i < nb_nics; i++) {
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pci_ne2000_init(&nd_table[i]);
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pci_ne2000_init(pci_bus, &nd_table[i]);
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}
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}
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ide0_mem_index = pmac_ide_init(&bs_table[0], openpic, 0x13);
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ide0_mem_index = pmac_ide_init(&bs_table[0], openpic, 0x13);
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@ -213,7 +214,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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adb_kbd_init(&adb_bus);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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macio_init();
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macio_init(pci_bus);
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nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
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nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
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@ -418,6 +418,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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int ret, linux_boot, i, nb_nics1, fd;
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int ret, linux_boot, i, nb_nics1, fd;
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unsigned long bios_offset;
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unsigned long bios_offset;
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uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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PCIBus *pci_bus;
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sysctrl = qemu_mallocz(sizeof(sysctrl_t));
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sysctrl = qemu_mallocz(sizeof(sysctrl_t));
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if (sysctrl == NULL)
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if (sysctrl == NULL)
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@ -477,14 +478,14 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
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cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
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isa_mem_base = 0xc0000000;
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isa_mem_base = 0xc0000000;
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pci_prep_init();
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pci_bus = pci_prep_init();
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/* Register 64 KB of ISA IO space */
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/* Register 64 KB of ISA IO space */
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PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
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PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
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cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory);
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cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory);
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/* init basic PC hardware */
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/* init basic PC hardware */
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vga_initialize(ds, phys_ram_base + ram_size, ram_size,
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vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size, 1);
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vga_ram_size);
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rtc_init(0x70, 8);
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rtc_init(0x70, 8);
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// openpic = openpic_init(0x00000000, 0xF0000000, 1);
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// openpic = openpic_init(0x00000000, 0xF0000000, 1);
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// pic_init(openpic);
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// pic_init(openpic);
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@ -545,6 +546,4 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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/* XXX: need an option to load a NVRAM image */
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/* XXX: need an option to load a NVRAM image */
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0,
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0,
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graphic_width, graphic_height, graphic_depth);
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graphic_width, graphic_height, graphic_depth);
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pci_ppc_bios_init();
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}
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}
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12
hw/vga.c
12
hw/vga.c
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@ -1747,9 +1747,8 @@ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
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}
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}
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int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
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int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
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unsigned long vga_ram_offset, int vga_ram_size,
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unsigned long vga_ram_offset, int vga_ram_size)
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int is_pci)
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{
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{
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VGAState *s;
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VGAState *s;
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@ -1805,14 +1804,13 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
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cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000,
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cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000,
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vga_io_memory);
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vga_io_memory);
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if (is_pci) {
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if (bus) {
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PCIDevice *d;
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PCIDevice *d;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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|
||||||
d = pci_register_device("VGA",
|
d = pci_register_device(bus, "VGA",
|
||||||
sizeof(PCIDevice),
|
sizeof(PCIDevice),
|
||||||
0, -1,
|
-1, NULL, NULL);
|
||||||
NULL, NULL);
|
|
||||||
pci_conf = d->config;
|
pci_conf = d->config;
|
||||||
pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
|
pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
|
||||||
pci_conf[0x01] = 0x12;
|
pci_conf[0x01] = 0x12;
|
||||||
|
|
35
vl.h
35
vl.h
|
@ -457,6 +457,7 @@ extern int pci_enabled;
|
||||||
|
|
||||||
extern target_phys_addr_t pci_mem_base;
|
extern target_phys_addr_t pci_mem_base;
|
||||||
|
|
||||||
|
typedef struct PCIBus PCIBus;
|
||||||
typedef struct PCIDevice PCIDevice;
|
typedef struct PCIDevice PCIDevice;
|
||||||
|
|
||||||
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
|
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
|
||||||
|
@ -484,7 +485,7 @@ struct PCIDevice {
|
||||||
uint8_t config[256];
|
uint8_t config[256];
|
||||||
|
|
||||||
/* the following fields are read only */
|
/* the following fields are read only */
|
||||||
int bus_num;
|
PCIBus *bus;
|
||||||
int devfn;
|
int devfn;
|
||||||
char name[64];
|
char name[64];
|
||||||
PCIIORegion io_regions[PCI_NUM_REGIONS];
|
PCIIORegion io_regions[PCI_NUM_REGIONS];
|
||||||
|
@ -495,8 +496,8 @@ struct PCIDevice {
|
||||||
int irq_index;
|
int irq_index;
|
||||||
};
|
};
|
||||||
|
|
||||||
PCIDevice *pci_register_device(const char *name, int instance_size,
|
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
|
||||||
int bus_num, int devfn,
|
int instance_size, int devfn,
|
||||||
PCIConfigReadFunc *config_read,
|
PCIConfigReadFunc *config_read,
|
||||||
PCIConfigWriteFunc *config_write);
|
PCIConfigWriteFunc *config_write);
|
||||||
|
|
||||||
|
@ -513,20 +514,22 @@ void pci_default_write_config(PCIDevice *d,
|
||||||
|
|
||||||
extern struct PIIX3State *piix3_state;
|
extern struct PIIX3State *piix3_state;
|
||||||
|
|
||||||
void i440fx_init(void);
|
PCIBus *i440fx_init(void);
|
||||||
void piix3_init(void);
|
void piix3_init(PCIBus *bus);
|
||||||
void pci_bios_init(void);
|
void pci_bios_init(void);
|
||||||
void pci_info(void);
|
void pci_info(void);
|
||||||
|
|
||||||
/* temporary: will be moved in platform specific file */
|
/* temporary: will be moved in platform specific file */
|
||||||
void pci_prep_init(void);
|
PCIBus *pci_prep_init(void);
|
||||||
void pci_pmac_init(void);
|
struct openpic_t;
|
||||||
void pci_ppc_bios_init(void);
|
void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic);
|
||||||
|
PCIBus *pci_pmac_init(void);
|
||||||
|
|
||||||
/* openpic.c */
|
/* openpic.c */
|
||||||
typedef struct openpic_t openpic_t;
|
typedef struct openpic_t openpic_t;
|
||||||
void openpic_set_irq (openpic_t *opp, int n_IRQ, int level);
|
void openpic_set_irq (openpic_t *opp, int n_IRQ, int level);
|
||||||
openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus);
|
openpic_t *openpic_init (PCIBus *bus,
|
||||||
|
uint32_t isu_base, uint32_t idu_base, int nb_cpus);
|
||||||
|
|
||||||
/* vga.c */
|
/* vga.c */
|
||||||
|
|
||||||
|
@ -551,17 +554,15 @@ static inline void dpy_resize(DisplayState *s, int w, int h)
|
||||||
s->dpy_resize(s, w, h);
|
s->dpy_resize(s, w, h);
|
||||||
}
|
}
|
||||||
|
|
||||||
int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
|
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
||||||
unsigned long vga_ram_offset, int vga_ram_size,
|
unsigned long vga_ram_offset, int vga_ram_size);
|
||||||
int is_pci);
|
|
||||||
void vga_update_display(void);
|
void vga_update_display(void);
|
||||||
void vga_invalidate_display(void);
|
void vga_invalidate_display(void);
|
||||||
void vga_screen_dump(const char *filename);
|
void vga_screen_dump(const char *filename);
|
||||||
|
|
||||||
/* cirrus_vga.c */
|
/* cirrus_vga.c */
|
||||||
void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
||||||
unsigned long vga_ram_offset, int vga_ram_size);
|
unsigned long vga_ram_offset, int vga_ram_size);
|
||||||
|
|
||||||
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
||||||
unsigned long vga_ram_offset, int vga_ram_size);
|
unsigned long vga_ram_offset, int vga_ram_size);
|
||||||
|
|
||||||
|
@ -575,8 +576,8 @@ extern BlockDriverState *bs_table[MAX_DISKS];
|
||||||
|
|
||||||
void isa_ide_init(int iobase, int iobase2, int irq,
|
void isa_ide_init(int iobase, int iobase2, int irq,
|
||||||
BlockDriverState *hd0, BlockDriverState *hd1);
|
BlockDriverState *hd0, BlockDriverState *hd1);
|
||||||
void pci_ide_init(BlockDriverState **hd_table);
|
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table);
|
||||||
void pci_piix3_ide_init(BlockDriverState **hd_table);
|
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
|
||||||
int pmac_ide_init (BlockDriverState **hd_table,
|
int pmac_ide_init (BlockDriverState **hd_table,
|
||||||
openpic_t *openpic, int irq);
|
openpic_t *openpic, int irq);
|
||||||
|
|
||||||
|
@ -627,7 +628,7 @@ int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
|
||||||
/* ne2000.c */
|
/* ne2000.c */
|
||||||
|
|
||||||
void isa_ne2000_init(int base, int irq, NetDriverState *nd);
|
void isa_ne2000_init(int base, int irq, NetDriverState *nd);
|
||||||
void pci_ne2000_init(NetDriverState *nd);
|
void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
|
||||||
|
|
||||||
/* pckbd.c */
|
/* pckbd.c */
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue