target/arm: Make sure that commpage's tb->size != 0
tb_gen_code() assumes that tb->size must never be zero, otherwise it may produce spurious exceptions. For ARM this may happen when creating a translation block for the commpage. Fix by pretending that commpage translation blocks have at least one instruction. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210416154939.32404-3-iii@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -8981,6 +8981,7 @@ static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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unsigned int insn;
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unsigned int insn;
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if (arm_pre_translate_insn(dc)) {
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if (arm_pre_translate_insn(dc)) {
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dc->base.pc_next += 4;
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return;
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return;
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}
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}
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@ -9050,6 +9051,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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bool is_16bit;
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bool is_16bit;
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if (arm_pre_translate_insn(dc)) {
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if (arm_pre_translate_insn(dc)) {
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dc->base.pc_next += 2;
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return;
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return;
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}
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}
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