haraldwolff/qemu-patch-raspberry4
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

m68k pull-request 20200706

Browse source 
disable floatx80_invalid_encoding() for m68k
 fix m68k_cpu_get_phys_page_debug()
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl8DhA0SHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748kn8QAJkOBWOP/CgzyB/uaPE44kLVcNBLDo9Q
 umB1JHhrchwTd/QtlTjp5dty4NgQsSfCE1dsgCKhv+vP73IGZW83ziXXnSiO5Ant
 wfXvzppT93yZ01dk0a+/HvHhWeYxDOhdqZ95AZZTiVEPnT6L+dneNN4Vz1Ri5CSw
 nW8AYmPGoGLQp0rcANHwXLm40pET5VzYmvf8rrzCYpCpYy3pIeKIbGJkPqh+XCXW
 ugZgQtXoKAcHPtHa0wO57ysC1t5S1O5K772AlDss25my/McG+QySHST/xCORch42
 v4HvYlAn/MiyoRw+noz8DXGn0gr+MeZYGbn1nmimB/xjB8fvIFn+7rhGtUa0miBF
 ewA9eLOuikzCw7I5SHtSOseDkZci9DJKcIXL+jIQLfBZbFSLXrmxgG9oVOYdm+FL
 6Wq2Hpd3H4TRNvuOHeZkxUJ4+SUnEZ7P9IFl4cG2euq5qUK9GQ1oG2Msi+Au5nTq
 Nin6FYj5qKXn1vjLzUiTz4DOjpIN1HyB0EvzOrjR+eI/KmMFZY7h3EoeUwPeymrV
 QR2N+hU/l1e+VZBSBnpdgUu32162DrmLBcvGBg5Cxb4bdnEqvKINAVez4pkh+7yj
 WxXG4jOCfBeJWIJ7yLAaZRdTZ/RSs1kO6Ksnr+Y4tAFkkbXqJPCwHM6nTEt13X1d
 BIT0s1TJ+DvX
 =JAxe
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' into staging

m68k pull-request 20200706

disable floatx80_invalid_encoding() for m68k
fix m68k_cpu_get_phys_page_debug()

# gpg: Signature made Mon 06 Jul 2020 21:05:33 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-next-pull-request:
  softfloat,m68k: disable floatx80_invalid_encoding() for m68k
  target/m68k: consolidate physical translation offset into get_physical_address()
  target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-07-08 21:38:47 +01:00
parent 8796c64ecd d159dd058c
commit 48f22ad04e
2 changed files with 32 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

24
include/fpu/softfloat.h
View file

@ -794,7 +794,31 @@ static inline bool floatx80_unordered_quiet(floatx80 a, floatx80 b,
*----------------------------------------------------------------------------*/
static inline bool floatx80_invalid_encoding(floatx80 a)
{
#if defined(TARGET_M68K)
/*-------------------------------------------------------------------------
| With m68k, the explicit integer bit can be zero in the case of:
| - zeros (exp == 0, mantissa == 0)
| - denormalized numbers (exp == 0, mantissa != 0)
| - unnormalized numbers (exp != 0, exp < 0x7FFF)
| - infinities (exp == 0x7FFF, mantissa == 0)
| - not-a-numbers (exp == 0x7FFF, mantissa != 0)
|
| For infinities and NaNs, the explicit integer bit can be either one or
| zero.
|
| The IEEE 754 standard does not define a zero integer bit. Such a number
| is an unnormalized number. Hardware does not directly support
| denormalized and unnormalized numbers, but implicitly supports them by
| trapping them as unimplemented data types, allowing efficient conversion
| in software.
|
| See "M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL",
| "1.6 FLOATING-POINT DATA TYPES"
*------------------------------------------------------------------------*/
return false;
#else
return (a.low & (1ULL << 63)) == 0 && (a.high & 0x7FFF) != 0;
#endif
}
#define floatx80_zero make_floatx80(0x0000, 0x0000000000000000LL)

17
target/m68k/helper.c
View file

@ -643,7 +643,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
/* Transparent Translation Register bit */
env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040;
}
*physical = address & TARGET_PAGE_MASK;
*physical = address;
*page_size = TARGET_PAGE_SIZE;
return 0;
}
@ -771,7 +771,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
}
*page_size = 1 << page_bits;
page_mask = ~(*page_size - 1);
*physical = next & page_mask;
*physical = (next & page_mask) + (address & (*page_size - 1));
if (access_type & ACCESS_PTEST) {
env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040;
@ -820,10 +820,12 @@ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
if (env->sr & SR_S) {
access_type |= ACCESS_SUPER;
}
if (get_physical_address(env, &phys_addr, &prot,
addr, access_type, &page_size) != 0) {
return -1;
}
return phys_addr;
}
@ -887,10 +889,8 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
ret = get_physical_address(&cpu->env, &physical, &prot,
address, access_type, &page_size);
if (likely(ret == 0)) {
address &= TARGET_PAGE_MASK;
physical += address & (page_size - 1);
tlb_set_page(cs, address, physical,
prot, mmu_idx, TARGET_PAGE_SIZE);
tlb_set_page(cs, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot, mmu_idx, page_size);
return true;
}
@ -1379,9 +1379,8 @@ void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
ret = get_physical_address(env, &physical, &prot, addr,
access_type, &page_size);
if (ret == 0) {
addr &= TARGET_PAGE_MASK;
physical += addr & (page_size - 1);
tlb_set_page(env_cpu(env), addr, physical,
tlb_set_page(env_cpu(env), addr & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK,
prot, access_type & ACCESS_SUPER ?
MMU_KERNEL_IDX : MMU_USER_IDX, page_size);
}