Implement mtfsf.L encoding
Mtfsf can have the L bit set, so all the register contents get stored in FPSCR. Linux uses it, so let's implement it. Signed-off-by: Alexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6753 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -2420,9 +2420,10 @@ GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT)
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}
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/* mtfsf */
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GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT)
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GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00010000, PPC_FLOAT)
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{
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TCGv_i32 t0;
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int L = ctx->opcode & 0x02000000;
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if (unlikely(!ctx->fpu_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_FPU);
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@ -2431,6 +2432,9 @@ GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT)
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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gen_reset_fpstatus();
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if (L)
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t0 = tcg_const_i32(0xff);
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else
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t0 = tcg_const_i32(FM(ctx->opcode));
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gen_helper_store_fpscr(cpu_fpr[rB(ctx->opcode)], t0);
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tcg_temp_free_i32(t0);
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