vfio-pci: Generalize PCI config mangling
Kernel-side vfio virtualizes all of config space, but some parts are unique to Qemu. For instance we may or may not expose the ROM BAR, Qemu manages MSI/MSIX, and Qemu manages the multi-function bit so that single function devices can appear as multi-function and vica versa. Generalize this into a bitmap of Qemu emulated bits. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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@ -117,6 +117,7 @@ typedef struct VFIODevice {
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int fd;
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VFIOINTx intx;
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unsigned int config_size;
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uint8_t *emulated_config_bits; /* QEMU emulated bits, little-endian */
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off_t config_offset; /* Offset of config space region within device fd */
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unsigned int rom_size;
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off_t rom_offset; /* Offset of ROM region within device fd */
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@ -963,44 +964,29 @@ static const MemoryRegionOps vfio_bar_ops = {
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static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
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{
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VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
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uint32_t val = 0;
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uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val;
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/*
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* We only need QEMU PCI config support for the ROM BAR, the MSI and MSIX
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* capabilities, and the multifunction bit below. We let VFIO handle
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* virtualizing everything else. Performance is not a concern here.
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*/
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if (ranges_overlap(addr, len, PCI_ROM_ADDRESS, 4) ||
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(pdev->cap_present & QEMU_PCI_CAP_MSIX &&
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ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) ||
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(pdev->cap_present & QEMU_PCI_CAP_MSI &&
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ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size))) {
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memcpy(&emu_bits, vdev->emulated_config_bits + addr, len);
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emu_bits = le32_to_cpu(emu_bits);
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val = pci_default_read_config(pdev, addr, len);
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} else {
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if (pread(vdev->fd, &val, len, vdev->config_offset + addr) != len) {
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if (emu_bits) {
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emu_val = pci_default_read_config(pdev, addr, len);
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}
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if (~emu_bits & (0xffffffffU >> (32 - len * 8))) {
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ssize_t ret;
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ret = pread(vdev->fd, &phys_val, len, vdev->config_offset + addr);
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if (ret != len) {
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error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m",
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__func__, vdev->host.domain, vdev->host.bus,
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vdev->host.slot, vdev->host.function, addr, len);
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return -errno;
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}
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val = le32_to_cpu(val);
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phys_val = le32_to_cpu(phys_val);
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}
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/* Multifunction bit is virualized in QEMU */
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if (unlikely(ranges_overlap(addr, len, PCI_HEADER_TYPE, 1))) {
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uint32_t mask = PCI_HEADER_TYPE_MULTI_FUNCTION;
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if (len == 4) {
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mask <<= 16;
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}
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if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
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val |= mask;
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} else {
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val &= ~mask;
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}
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}
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val = (emu_val & emu_bits) | (phys_val & ~emu_bits);
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DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, len=0x%x) %x\n", __func__,
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vdev->host.domain, vdev->host.bus, vdev->host.slot,
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@ -1026,12 +1012,6 @@ static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
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vdev->host.slot, vdev->host.function, addr, val, len);
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}
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/* Write standard header bits to emulation */
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if (addr < PCI_CONFIG_HEADER_SIZE) {
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pci_default_write_config(pdev, addr, val, len);
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return;
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}
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/* MSI/MSI-X Enabling/Disabling */
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if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
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ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
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@ -1046,9 +1026,7 @@ static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
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} else if (was_enabled && !is_enabled) {
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vfio_disable_msi(vdev);
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}
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}
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if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
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} else if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
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ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
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int is_enabled, was_enabled = msix_enabled(pdev);
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@ -1061,6 +1039,9 @@ static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
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} else if (was_enabled && !is_enabled) {
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vfio_disable_msix(vdev);
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}
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} else {
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/* Write everything to QEMU to keep emulated bits correct */
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pci_default_write_config(pdev, addr, val, len);
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}
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}
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@ -2003,6 +1984,16 @@ static int vfio_initfn(PCIDevice *pdev)
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goto out_put;
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}
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/* vfio emulates a lot for us, but some bits need extra love */
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vdev->emulated_config_bits = g_malloc0(vdev->config_size);
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/* QEMU can choose to expose the ROM or not */
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memset(vdev->emulated_config_bits + PCI_ROM_ADDRESS, 0xff, 4);
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/* QEMU can change multi-function devices to single function, or reverse */
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vdev->emulated_config_bits[PCI_HEADER_TYPE] =
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PCI_HEADER_TYPE_MULTI_FUNCTION;
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/*
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* Clear host resource mapping info. If we choose not to register a
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* BAR, such as might be the case with the option ROM, we can get
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@ -2025,6 +2016,17 @@ static int vfio_initfn(PCIDevice *pdev)
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goto out_teardown;
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}
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/* QEMU emulates all of MSI & MSIX */
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if (pdev->cap_present & QEMU_PCI_CAP_MSIX) {
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memset(vdev->emulated_config_bits + pdev->msix_cap, 0xff,
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MSIX_CAP_LENGTH);
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}
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if (pdev->cap_present & QEMU_PCI_CAP_MSI) {
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memset(vdev->emulated_config_bits + pdev->msi_cap, 0xff,
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vdev->msi_cap_size);
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}
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if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
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vdev->intx.mmap_timer = qemu_new_timer_ms(vm_clock,
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vfio_intx_mmap_enable, vdev);
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@ -2042,6 +2044,7 @@ out_teardown:
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vfio_teardown_msi(vdev);
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vfio_unmap_bars(vdev);
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out_put:
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g_free(vdev->emulated_config_bits);
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vfio_put_device(vdev);
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vfio_put_group(group);
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return ret;
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@ -2059,6 +2062,7 @@ static void vfio_exitfn(PCIDevice *pdev)
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}
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vfio_teardown_msi(vdev);
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vfio_unmap_bars(vdev);
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g_free(vdev->emulated_config_bits);
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vfio_put_device(vdev);
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vfio_put_group(group);
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}
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