pci-host: designware: add pcie-msi read method
Add pcie-msi mmio read method to avoid NULL pointer dereference issue. Reported-by: Lei Sun <slei.casper@gmail.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-Id: <20200811114133.672647-3-ppandit@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -21,6 +21,7 @@
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#include "qemu/osdep.h"
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "qemu/module.h"
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#include "qemu/log.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pci_host.h"
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#include "hw/pci/pci_host.h"
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@ -63,6 +64,23 @@ designware_pcie_root_to_host(DesignwarePCIERoot *root)
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return DESIGNWARE_PCIE_HOST(bus->parent);
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return DESIGNWARE_PCIE_HOST(bus->parent);
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}
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}
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static uint64_t designware_pcie_root_msi_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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/*
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* Attempts to read from the MSI address are undefined in
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* the PCI specifications. For this hardware, the datasheet
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* specifies that a read from the magic address is simply not
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* intercepted by the MSI controller, and will go out to the
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* AHB/AXI bus like any other PCI-device-initiated DMA read.
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* This is not trivial to implement in QEMU, so since
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* well-behaved guests won't ever ask a PCI device to DMA from
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* this address we just log the missing functionality.
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*/
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qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__);
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return 0;
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}
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static void designware_pcie_root_msi_write(void *opaque, hwaddr addr,
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static void designware_pcie_root_msi_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned len)
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uint64_t val, unsigned len)
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{
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{
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@ -77,6 +95,7 @@ static void designware_pcie_root_msi_write(void *opaque, hwaddr addr,
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}
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}
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static const MemoryRegionOps designware_pci_host_msi_ops = {
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static const MemoryRegionOps designware_pci_host_msi_ops = {
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.read = designware_pcie_root_msi_read,
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.write = designware_pcie_root_msi_write,
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.write = designware_pcie_root_msi_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.valid = {
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