target/i386: move cpu_tmp3_i32 to DisasContext
Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -79,7 +79,6 @@ static TCGv cpu_seg_base[6];
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static TCGv_i64 cpu_bndl[4];
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static TCGv_i64 cpu_bndu[4];
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static TCGv_i32 cpu_tmp3_i32;
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static TCGv_i64 cpu_tmp1_i64;
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#include "exec/gen-icount.h"
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@ -143,6 +142,7 @@ typedef struct DisasContext {
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TCGv_ptr ptr0;
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TCGv_ptr ptr1;
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TCGv_i32 tmp2_i32;
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TCGv_i32 tmp3_i32;
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sigjmp_buf jmpbuf;
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} DisasContext;
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@ -1159,8 +1159,8 @@ static inline void gen_outs(DisasContext *s, TCGMemOp ot)
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tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_EDX]);
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tcg_gen_andi_i32(s->tmp2_i32, s->tmp2_i32, 0xffff);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, s->T0);
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gen_helper_out_func(ot, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T0);
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gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
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gen_op_movl_T0_Dshift(s, ot);
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gen_op_add_reg_T0(s, s->aflag, R_ESI);
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gen_bpt_io(s, s->tmp2_i32, ot);
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@ -1426,8 +1426,8 @@ static void gen_shift_flags(DisasContext *s, TCGMemOp ot, TCGv result,
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if (s->cc_op == CC_OP_DYNAMIC) {
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oldop = cpu_cc_op;
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} else {
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tcg_gen_movi_i32(cpu_tmp3_i32, s->cc_op);
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oldop = cpu_tmp3_i32;
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tcg_gen_movi_i32(s->tmp3_i32, s->cc_op);
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oldop = s->tmp3_i32;
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}
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/* Conditionally store the CC_OP value. */
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@ -1546,11 +1546,11 @@ static void gen_rot_rm_T1(DisasContext *s, TCGMemOp ot, int op1, int is_right)
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#ifdef TARGET_X86_64
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case MO_32:
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, s->T1);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1);
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if (is_right) {
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tcg_gen_rotr_i32(s->tmp2_i32, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_rotr_i32(s->tmp2_i32, s->tmp2_i32, s->tmp3_i32);
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} else {
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tcg_gen_rotl_i32(s->tmp2_i32, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_rotl_i32(s->tmp2_i32, s->tmp2_i32, s->tmp3_i32);
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}
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tcg_gen_extu_i32_tl(s->T0, s->tmp2_i32);
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break;
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@ -1593,9 +1593,9 @@ static void gen_rot_rm_T1(DisasContext *s, TCGMemOp ot, int op1, int is_right)
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t1 = tcg_temp_new_i32();
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tcg_gen_trunc_tl_i32(t1, s->T1);
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tcg_gen_movi_i32(s->tmp2_i32, CC_OP_ADCOX);
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tcg_gen_movi_i32(cpu_tmp3_i32, CC_OP_EFLAGS);
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tcg_gen_movi_i32(s->tmp3_i32, CC_OP_EFLAGS);
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tcg_gen_movcond_i32(TCG_COND_NE, cpu_cc_op, t1, t0,
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s->tmp2_i32, cpu_tmp3_i32);
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s->tmp2_i32, s->tmp3_i32);
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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@ -3912,11 +3912,11 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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switch (ot) {
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default:
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_regs[R_EDX]);
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tcg_gen_mulu2_i32(s->tmp2_i32, cpu_tmp3_i32,
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s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, cpu_regs[R_EDX]);
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tcg_gen_mulu2_i32(s->tmp2_i32, s->tmp3_i32,
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s->tmp2_i32, s->tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[s->vex_v], s->tmp2_i32);
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tcg_gen_extu_i32_tl(cpu_regs[reg], cpu_tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp3_i32);
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break;
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#ifdef TARGET_X86_64
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case MO_64:
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@ -4882,11 +4882,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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default:
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case MO_32:
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_regs[R_EAX]);
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tcg_gen_mulu2_i32(s->tmp2_i32, cpu_tmp3_i32,
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s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, cpu_regs[R_EAX]);
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tcg_gen_mulu2_i32(s->tmp2_i32, s->tmp3_i32,
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s->tmp2_i32, s->tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[R_EAX], s->tmp2_i32);
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tcg_gen_extu_i32_tl(cpu_regs[R_EDX], cpu_tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[R_EDX], s->tmp3_i32);
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tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[R_EAX]);
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tcg_gen_mov_tl(cpu_cc_src, cpu_regs[R_EDX]);
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set_cc_op(s, CC_OP_MULL);
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@ -4933,14 +4933,14 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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default:
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case MO_32:
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_regs[R_EAX]);
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tcg_gen_muls2_i32(s->tmp2_i32, cpu_tmp3_i32,
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s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, cpu_regs[R_EAX]);
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tcg_gen_muls2_i32(s->tmp2_i32, s->tmp3_i32,
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s->tmp2_i32, s->tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[R_EAX], s->tmp2_i32);
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tcg_gen_extu_i32_tl(cpu_regs[R_EDX], cpu_tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[R_EDX], s->tmp3_i32);
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tcg_gen_sari_i32(s->tmp2_i32, s->tmp2_i32, 31);
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tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[R_EAX]);
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tcg_gen_sub_i32(s->tmp2_i32, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_sub_i32(s->tmp2_i32, s->tmp2_i32, s->tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_cc_src, s->tmp2_i32);
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set_cc_op(s, CC_OP_MULL);
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break;
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@ -5210,13 +5210,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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#endif
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case MO_32:
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, s->T1);
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tcg_gen_muls2_i32(s->tmp2_i32, cpu_tmp3_i32,
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s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1);
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tcg_gen_muls2_i32(s->tmp2_i32, s->tmp3_i32,
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s->tmp2_i32, s->tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp2_i32);
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tcg_gen_sari_i32(s->tmp2_i32, s->tmp2_i32, 31);
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tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[reg]);
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tcg_gen_sub_i32(s->tmp2_i32, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_sub_i32(s->tmp2_i32, s->tmp2_i32, s->tmp3_i32);
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tcg_gen_extu_i32_tl(cpu_cc_src, s->tmp2_i32);
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break;
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default:
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@ -6417,8 +6417,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_io_start();
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}
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tcg_gen_movi_i32(s->tmp2_i32, val);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, s->T1);
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gen_helper_out_func(ot, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1);
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gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
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gen_bpt_io(s, s->tmp2_i32, ot);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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@ -6455,8 +6455,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_io_start();
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}
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tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
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tcg_gen_trunc_tl_i32(cpu_tmp3_i32, s->T1);
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gen_helper_out_func(ot, s->tmp2_i32, cpu_tmp3_i32);
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tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1);
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gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
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gen_bpt_io(s, s->tmp2_i32, ot);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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@ -8486,7 +8486,7 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
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dc->tmp0 = tcg_temp_new();
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cpu_tmp1_i64 = tcg_temp_new_i64();
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dc->tmp2_i32 = tcg_temp_new_i32();
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cpu_tmp3_i32 = tcg_temp_new_i32();
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dc->tmp3_i32 = tcg_temp_new_i32();
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dc->tmp4 = tcg_temp_new();
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dc->ptr0 = tcg_temp_new_ptr();
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dc->ptr1 = tcg_temp_new_ptr();
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