intc/arm_gic: Remove some dead code and put some functions static
Some functions are now only used in arm_gic.c, put them static. Some of them where only used by the NVIC implementation and are not used anymore, so remove them. Signed-off-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180727095421.386-4-luc.michel@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -71,7 +71,7 @@ static inline bool gic_has_groups(GICState *s)
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/* TODO: Many places that call this routine could be optimized. */
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/* Update interrupt status after enabled or pending bits have been changed. */
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void gic_update(GICState *s)
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static void gic_update(GICState *s)
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{
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int best_irq;
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int best_prio;
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@ -137,19 +137,6 @@ void gic_update(GICState *s)
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}
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}
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void gic_set_pending_private(GICState *s, int cpu, int irq)
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{
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int cm = 1 << cpu;
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if (gic_test_pending(s, irq, cm)) {
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return;
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}
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DPRINTF("Set %d pending cpu %d\n", irq, cpu);
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GIC_DIST_SET_PENDING(irq, cm);
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gic_update(s);
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}
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static void gic_set_irq_11mpcore(GICState *s, int irq, int level,
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int cm, int target)
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{
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@ -579,7 +566,7 @@ static void gic_deactivate_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
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GIC_DIST_CLEAR_ACTIVE(irq, cm);
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}
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void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
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static void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
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{
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int cm = 1 << cpu;
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int group;
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@ -1488,12 +1475,6 @@ static const MemoryRegionOps gic_cpu_ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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/* This function is used by nvic model */
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void gic_init_irqs_and_distributor(GICState *s)
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{
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gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops);
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}
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static void arm_gic_realize(DeviceState *dev, Error **errp)
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{
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/* Device instance realize function for the GIC sysbus device */
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@ -75,11 +75,7 @@
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/* The special cases for the revision property: */
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#define REV_11MPCORE 0
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void gic_set_pending_private(GICState *s, int cpu, int irq);
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uint32_t gic_acknowledge_irq(GICState *s, int cpu, MemTxAttrs attrs);
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void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs);
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void gic_update(GICState *s);
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void gic_init_irqs_and_distributor(GICState *s);
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void gic_dist_set_priority(GICState *s, int cpu, int irq, uint8_t val,
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MemTxAttrs attrs);
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