hw/riscv: sifive_u: Add reset functionality
The HiFive Unleashed board wires GPIO pin#10 to the input of the system reset signal. Let's set up the GPIO pin#10 and insert a "gpio-restart" device tree node so that reboot is now functional with QEMU 'sifive_u' machine. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1591625864-31494-10-git-send-email-bmeng.cn@gmail.com Message-Id: <1591625864-31494-10-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -37,6 +37,7 @@
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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#include "hw/boards.h"
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#include "hw/irq.h"
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#include "hw/loader.h"
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#include "hw/sysbus.h"
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#include "hw/char/serial.h"
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@ -53,6 +54,7 @@
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#include "net/eth.h"
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#include "sysemu/arch_init.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/runstate.h"
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#include "sysemu/sysemu.h"
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#include "exec/address-spaces.h"
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@ -96,7 +98,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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uint32_t *cells;
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char *nodename;
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char ethclk_names[] = "pclk\0hclk";
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uint32_t plic_phandle, prci_phandle, phandle = 1;
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uint32_t plic_phandle, prci_phandle, gpio_phandle, phandle = 1;
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uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle;
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fdt = s->fdt = create_device_tree(&s->fdt_size);
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@ -270,9 +272,11 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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g_free(cells);
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g_free(nodename);
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gpio_phandle = phandle++;
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nodename = g_strdup_printf("/soc/gpio@%lx",
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(long)memmap[SIFIVE_U_GPIO].base);
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_setprop_cell(fdt, nodename, "phandle", gpio_phandle);
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qemu_fdt_setprop_cells(fdt, nodename, "clocks",
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prci_phandle, PRCI_CLK_TLCLK);
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qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 2);
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@ -292,6 +296,12 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,gpio0");
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g_free(nodename);
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nodename = g_strdup_printf("/gpio-restart");
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qemu_fdt_add_subnode(fdt, nodename);
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qemu_fdt_setprop_cells(fdt, nodename, "gpios", gpio_phandle, 10, 1);
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qemu_fdt_setprop_string(fdt, nodename, "compatible", "gpio-restart");
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g_free(nodename);
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phy_phandle = phandle++;
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nodename = g_strdup_printf("/soc/ethernet@%lx",
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(long)memmap[SIFIVE_U_GEM].base);
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@ -352,6 +362,14 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
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g_free(nodename);
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}
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static void sifive_u_machine_reset(void *opaque, int n, int level)
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{
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/* gpio pin active low triggers reset */
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if (!level) {
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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}
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}
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static void sifive_u_machine_init(MachineState *machine)
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{
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const struct MemmapEntry *memmap = sifive_u_memmap;
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@ -380,6 +398,10 @@ static void sifive_u_machine_init(MachineState *machine)
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memory_region_add_subregion(system_memory, memmap[SIFIVE_U_FLASH0].base,
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flash0);
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/* register gpio-restart */
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qdev_connect_gpio_out(DEVICE(&(s->soc.gpio)), 10,
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qemu_allocate_irq(sifive_u_machine_reset, NULL, 0));
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/* create device tree */
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create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
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