nseries: Rename n800_s::cpu to mpu
omap_mpu_state_s::env was renamed to cpu while changing its type. With n800_s::cpu of type omap_mpu_state_s* this leads to s->cpu->cpu. Rename the field to "mpu" to avoid this ugliness. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
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dbaf26b3b2
commit
518ec1342c
72
hw/nseries.c
72
hw/nseries.c
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@ -37,7 +37,7 @@
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/* Nokia N8x0 support */
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struct n800_s {
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struct omap_mpu_state_s *cpu;
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struct omap_mpu_state_s *mpu;
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struct rfbi_chip_s blizzard;
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struct {
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@ -135,10 +135,10 @@ static void n800_mmc_cs_cb(void *opaque, int line, int level)
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static void n8x0_gpio_setup(struct n800_s *s)
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{
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qemu_irq *mmc_cs = qemu_allocate_irqs(n800_mmc_cs_cb, s->cpu->mmc, 1);
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_MMC_CS_GPIO, mmc_cs[0]);
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qemu_irq *mmc_cs = qemu_allocate_irqs(n800_mmc_cs_cb, s->mpu->mmc, 1);
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_MMC_CS_GPIO, mmc_cs[0]);
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qemu_irq_lower(qdev_get_gpio_in(s->cpu->gpio, N800_BAT_COVER_GPIO));
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qemu_irq_lower(qdev_get_gpio_in(s->mpu->gpio, N800_BAT_COVER_GPIO));
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}
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#define MAEMO_CAL_HEADER(...) \
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@ -179,8 +179,8 @@ static void n8x0_nand_setup(struct n800_s *s)
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}
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qdev_init_nofail(s->nand);
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sysbus_connect_irq(sysbus_from_qdev(s->nand), 0,
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qdev_get_gpio_in(s->cpu->gpio, N8X0_ONENAND_GPIO));
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omap_gpmc_attach(s->cpu->gpmc, N8X0_ONENAND_CS,
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qdev_get_gpio_in(s->mpu->gpio, N8X0_ONENAND_GPIO));
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omap_gpmc_attach(s->mpu->gpmc, N8X0_ONENAND_CS,
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sysbus_mmio_get_region(sysbus_from_qdev(s->nand), 0));
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otp_region = onenand_raw_otp(s->nand);
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@ -192,13 +192,13 @@ static void n8x0_nand_setup(struct n800_s *s)
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static void n8x0_i2c_setup(struct n800_s *s)
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{
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DeviceState *dev;
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qemu_irq tmp_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_TMP105_GPIO);
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i2c_bus *i2c = omap_i2c_bus(s->cpu->i2c[0]);
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qemu_irq tmp_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_TMP105_GPIO);
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i2c_bus *i2c = omap_i2c_bus(s->mpu->i2c[0]);
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/* Attach a menelaus PM chip */
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dev = i2c_create_slave(i2c, "twl92230", N8X0_MENELAUS_ADDR);
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qdev_connect_gpio_out(dev, 3,
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qdev_get_gpio_in(s->cpu->ih[0],
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qdev_get_gpio_in(s->mpu->ih[0],
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OMAP_INT_24XX_SYS_NIRQ));
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qemu_system_powerdown = qdev_get_gpio_in(dev, 3);
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@ -263,8 +263,8 @@ static void n800_tsc_kbd_setup(struct n800_s *s)
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/* XXX: are the three pins inverted inside the chip between the
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* tsc and the cpu (N4111)? */
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qemu_irq penirq = NULL; /* NC */
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qemu_irq kbirq = qdev_get_gpio_in(s->cpu->gpio, N800_TSC_KP_IRQ_GPIO);
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qemu_irq dav = qdev_get_gpio_in(s->cpu->gpio, N800_TSC_TS_GPIO);
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qemu_irq kbirq = qdev_get_gpio_in(s->mpu->gpio, N800_TSC_KP_IRQ_GPIO);
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qemu_irq dav = qdev_get_gpio_in(s->mpu->gpio, N800_TSC_TS_GPIO);
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s->ts.chip = tsc2301_init(penirq, kbirq, dav);
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s->ts.opaque = s->ts.chip->opaque;
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@ -283,7 +283,7 @@ static void n800_tsc_kbd_setup(struct n800_s *s)
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static void n810_tsc_setup(struct n800_s *s)
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{
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qemu_irq pintdav = qdev_get_gpio_in(s->cpu->gpio, N810_TSC_TS_GPIO);
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qemu_irq pintdav = qdev_get_gpio_in(s->mpu->gpio, N810_TSC_TS_GPIO);
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s->ts.opaque = tsc2005_init(pintdav);
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s->ts.txrx = tsc2005_txrx;
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@ -375,7 +375,7 @@ static int n810_keys[0x80] = {
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static void n810_kbd_setup(struct n800_s *s)
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{
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qemu_irq kbd_irq = qdev_get_gpio_in(s->cpu->gpio, N810_KEYBOARD_GPIO);
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qemu_irq kbd_irq = qdev_get_gpio_in(s->mpu->gpio, N810_KEYBOARD_GPIO);
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int i;
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for (i = 0; i < 0x80; i ++)
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@ -388,7 +388,7 @@ static void n810_kbd_setup(struct n800_s *s)
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/* Attach the LM8322 keyboard to the I2C bus,
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* should happen in n8x0_i2c_setup and s->kbd be initialised here. */
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s->kbd = i2c_create_slave(omap_i2c_bus(s->cpu->i2c[0]),
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s->kbd = i2c_create_slave(omap_i2c_bus(s->mpu->i2c[0]),
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"lm8323", N810_LM8323_ADDR);
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qdev_connect_gpio_out(s->kbd, 0, kbd_irq);
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}
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@ -679,8 +679,8 @@ static void n8x0_spi_setup(struct n800_s *s)
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void *tsc = s->ts.opaque;
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void *mipid = mipid_init();
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omap_mcspi_attach(s->cpu->mcspi[0], s->ts.txrx, tsc, 0);
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omap_mcspi_attach(s->cpu->mcspi[0], mipid_txrx, mipid, 1);
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omap_mcspi_attach(s->mpu->mcspi[0], s->ts.txrx, tsc, 0);
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omap_mcspi_attach(s->mpu->mcspi[0], mipid_txrx, mipid, 1);
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}
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/* This task is normally performed by the bootloader. If we're loading
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@ -735,20 +735,20 @@ static void n8x0_dss_setup(struct n800_s *s)
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s->blizzard.write = s1d13745_write;
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s->blizzard.read = s1d13745_read;
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omap_rfbi_attach(s->cpu->dss, 0, &s->blizzard);
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omap_rfbi_attach(s->mpu->dss, 0, &s->blizzard);
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}
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static void n8x0_cbus_setup(struct n800_s *s)
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{
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qemu_irq dat_out = qdev_get_gpio_in(s->cpu->gpio, N8X0_CBUS_DAT_GPIO);
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qemu_irq retu_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_RETU_GPIO);
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qemu_irq tahvo_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_TAHVO_GPIO);
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qemu_irq dat_out = qdev_get_gpio_in(s->mpu->gpio, N8X0_CBUS_DAT_GPIO);
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qemu_irq retu_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_RETU_GPIO);
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qemu_irq tahvo_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_TAHVO_GPIO);
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CBus *cbus = cbus_init(dat_out);
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_CBUS_CLK_GPIO, cbus->clk);
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_CBUS_DAT_GPIO, cbus->dat);
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_CBUS_SEL_GPIO, cbus->sel);
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_CBUS_CLK_GPIO, cbus->clk);
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_CBUS_DAT_GPIO, cbus->dat);
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_CBUS_SEL_GPIO, cbus->sel);
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cbus_attach(cbus, s->retu = retu_init(retu_irq, 1));
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cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1));
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@ -757,14 +757,14 @@ static void n8x0_cbus_setup(struct n800_s *s)
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static void n8x0_uart_setup(struct n800_s *s)
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{
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CharDriverState *radio = uart_hci_init(
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qdev_get_gpio_in(s->cpu->gpio, N8X0_BT_HOST_WKUP_GPIO));
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qdev_get_gpio_in(s->mpu->gpio, N8X0_BT_HOST_WKUP_GPIO));
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_BT_RESET_GPIO,
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_BT_RESET_GPIO,
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csrhci_pins_get(radio)[csrhci_pin_reset]);
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_BT_WKUP_GPIO,
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_BT_WKUP_GPIO,
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csrhci_pins_get(radio)[csrhci_pin_wakeup]);
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omap_uart_attach(s->cpu->uart[BT_UART], radio);
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omap_uart_attach(s->mpu->uart[BT_UART], radio);
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}
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static void n8x0_usb_setup(struct n800_s *s)
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@ -774,13 +774,13 @@ static void n8x0_usb_setup(struct n800_s *s)
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dev = sysbus_from_qdev(s->usb);
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qdev_init_nofail(s->usb);
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sysbus_connect_irq(dev, 0,
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qdev_get_gpio_in(s->cpu->gpio, N8X0_TUSB_INT_GPIO));
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qdev_get_gpio_in(s->mpu->gpio, N8X0_TUSB_INT_GPIO));
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/* Using the NOR interface */
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omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_ASYNC_CS,
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omap_gpmc_attach(s->mpu->gpmc, N8X0_USB_ASYNC_CS,
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sysbus_mmio_get_region(dev, 0));
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omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_SYNC_CS,
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omap_gpmc_attach(s->mpu->gpmc, N8X0_USB_SYNC_CS,
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sysbus_mmio_get_region(dev, 1));
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qdev_connect_gpio_out(s->cpu->gpio, N8X0_TUSB_ENABLE_GPIO,
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qdev_connect_gpio_out(s->mpu->gpio, N8X0_TUSB_ENABLE_GPIO,
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qdev_get_gpio_in(s->usb, 0)); /* tusb_pwr */
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}
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@ -1023,11 +1023,11 @@ static void n8x0_boot_init(void *opaque)
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n800_dss_init(&s->blizzard);
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/* CPU setup */
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s->cpu->cpu->env.GE = 0x5;
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s->mpu->cpu->env.GE = 0x5;
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/* If the machine has a slided keyboard, open it */
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if (s->kbd)
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qemu_irq_raise(qdev_get_gpio_in(s->cpu->gpio, N810_SLIDE_GPIO));
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qemu_irq_raise(qdev_get_gpio_in(s->mpu->gpio, N810_SLIDE_GPIO));
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}
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#define OMAP_TAG_NOKIA_BT 0x4e01
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@ -1281,7 +1281,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
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int sdram_size = binfo->ram_size;
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DisplayState *ds;
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s->cpu = omap2420_mpu_init(sysmem, sdram_size, cpu_model);
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s->mpu = omap2420_mpu_init(sysmem, sdram_size, cpu_model);
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/* Setup peripherals
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*
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@ -1329,7 +1329,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
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binfo->kernel_filename = kernel_filename;
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binfo->kernel_cmdline = kernel_cmdline;
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binfo->initrd_filename = initrd_filename;
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arm_load_kernel(&s->cpu->cpu->env, binfo);
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arm_load_kernel(&s->mpu->cpu->env, binfo);
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qemu_register_reset(n8x0_boot_init, s);
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}
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int rom_size;
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uint8_t nolo_tags[0x10000];
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/* No, wait, better start at the ROM. */
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s->cpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
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s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
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/* This is intended for loading the `secondary.bin' program from
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* Nokia images (the NOLO bootloader). The entry point seems
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