target-arm: Add ARMCPU secure property
Added a "has_el3" state property to the ARMCPU descriptor. This property indicates whether the ARMCPU has security extensions enabled (EL3) or not. By default it is disabled at this time. Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1418684992-8996-10-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
08828484a5
commit
51942aee3c
|
@ -100,6 +100,8 @@ typedef struct ARMCPU {
|
||||||
bool start_powered_off;
|
bool start_powered_off;
|
||||||
/* CPU currently in PSCI powered-off state */
|
/* CPU currently in PSCI powered-off state */
|
||||||
bool powered_off;
|
bool powered_off;
|
||||||
|
/* CPU has security extension */
|
||||||
|
bool has_el3;
|
||||||
|
|
||||||
/* PSCI conduit used to invoke PSCI methods
|
/* PSCI conduit used to invoke PSCI methods
|
||||||
* 0 - disabled, 1 - smc, 2 - hvc
|
* 0 - disabled, 1 - smc, 2 - hvc
|
||||||
|
|
|
@ -388,6 +388,9 @@ static Property arm_cpu_reset_hivecs_property =
|
||||||
static Property arm_cpu_rvbar_property =
|
static Property arm_cpu_rvbar_property =
|
||||||
DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0);
|
DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0);
|
||||||
|
|
||||||
|
static Property arm_cpu_has_el3_property =
|
||||||
|
DEFINE_PROP_BOOL("has_el3", ARMCPU, has_el3, true);
|
||||||
|
|
||||||
static void arm_cpu_post_init(Object *obj)
|
static void arm_cpu_post_init(Object *obj)
|
||||||
{
|
{
|
||||||
ARMCPU *cpu = ARM_CPU(obj);
|
ARMCPU *cpu = ARM_CPU(obj);
|
||||||
|
@ -407,6 +410,14 @@ static void arm_cpu_post_init(Object *obj)
|
||||||
qdev_property_add_static(DEVICE(obj), &arm_cpu_rvbar_property,
|
qdev_property_add_static(DEVICE(obj), &arm_cpu_rvbar_property,
|
||||||
&error_abort);
|
&error_abort);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
|
||||||
|
/* Add the has_el3 state CPU property only if EL3 is allowed. This will
|
||||||
|
* prevent "has_el3" from existing on CPUs which cannot support EL3.
|
||||||
|
*/
|
||||||
|
qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el3_property,
|
||||||
|
&error_abort);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void arm_cpu_finalizefn(Object *obj)
|
static void arm_cpu_finalizefn(Object *obj)
|
||||||
|
@ -476,6 +487,18 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
|
||||||
cpu->reset_sctlr |= (1 << 13);
|
cpu->reset_sctlr |= (1 << 13);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (!cpu->has_el3) {
|
||||||
|
/* If the has_el3 CPU property is disabled then we need to disable the
|
||||||
|
* feature.
|
||||||
|
*/
|
||||||
|
unset_feature(env, ARM_FEATURE_EL3);
|
||||||
|
|
||||||
|
/* Disable the security extension feature bits in the processor feature
|
||||||
|
* register as well. This is id_pfr1[7:4].
|
||||||
|
*/
|
||||||
|
cpu->id_pfr1 &= ~0xf0;
|
||||||
|
}
|
||||||
|
|
||||||
register_cp_regs_for_features(cpu);
|
register_cp_regs_for_features(cpu);
|
||||||
arm_cpu_register_gdb_regs_for_features(cpu);
|
arm_cpu_register_gdb_regs_for_features(cpu);
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue