scsi/megasas: QOM parent field cleanup
Replace direct uses of MegasasState::dev with QOM casts and rename it to parent_obj. Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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c79e16ae04
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52190c1e0a
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@ -70,7 +70,10 @@ typedef struct MegasasCmd {
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} MegasasCmd;
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} MegasasCmd;
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typedef struct MegasasState {
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typedef struct MegasasState {
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PCIDevice dev;
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/*< private >*/
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PCIDevice parent_obj;
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/*< public >*/
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MemoryRegion mmio_io;
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MemoryRegion mmio_io;
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MemoryRegion port_io;
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MemoryRegion port_io;
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MemoryRegion queue_io;
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MemoryRegion queue_io;
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@ -237,7 +240,7 @@ static int megasas_map_sgl(MegasasState *s, MegasasCmd *cmd, union mfi_sgl *sgl)
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MEGASAS_MAX_SGE);
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MEGASAS_MAX_SGE);
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return iov_count;
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return iov_count;
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}
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}
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pci_dma_sglist_init(&cmd->qsg, &s->dev, iov_count);
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pci_dma_sglist_init(&cmd->qsg, PCI_DEVICE(s), iov_count);
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for (i = 0; i < iov_count; i++) {
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for (i = 0; i < iov_count; i++) {
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dma_addr_t iov_pa, iov_size_p;
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dma_addr_t iov_pa, iov_size_p;
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@ -498,6 +501,7 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
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static void megasas_complete_frame(MegasasState *s, uint64_t context)
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static void megasas_complete_frame(MegasasState *s, uint64_t context)
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{
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{
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PCIDevice *pci_dev = PCI_DEVICE(s);
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int tail, queue_offset;
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int tail, queue_offset;
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/* Decrement busy count */
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/* Decrement busy count */
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@ -526,12 +530,12 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
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/* Notify HBA */
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/* Notify HBA */
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s->doorbell++;
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s->doorbell++;
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if (s->doorbell == 1) {
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if (s->doorbell == 1) {
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if (msix_enabled(&s->dev)) {
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if (msix_enabled(pci_dev)) {
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trace_megasas_msix_raise(0);
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trace_megasas_msix_raise(0);
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msix_notify(&s->dev, 0);
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msix_notify(pci_dev, 0);
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} else {
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} else {
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trace_megasas_irq_raise();
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trace_megasas_irq_raise();
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qemu_irq_raise(s->dev.irq[0]);
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qemu_irq_raise(pci_dev->irq[0]);
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}
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}
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}
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}
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} else {
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} else {
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@ -633,7 +637,7 @@ static int megasas_map_dcmd(MegasasState *s, MegasasCmd *cmd)
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}
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}
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iov_pa = megasas_sgl_get_addr(cmd, &cmd->frame->dcmd.sgl);
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iov_pa = megasas_sgl_get_addr(cmd, &cmd->frame->dcmd.sgl);
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iov_size = megasas_sgl_get_len(cmd, &cmd->frame->dcmd.sgl);
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iov_size = megasas_sgl_get_len(cmd, &cmd->frame->dcmd.sgl);
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pci_dma_sglist_init(&cmd->qsg, &s->dev, 1);
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pci_dma_sglist_init(&cmd->qsg, PCI_DEVICE(s), 1);
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qemu_sglist_add(&cmd->qsg, iov_pa, iov_size);
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qemu_sglist_add(&cmd->qsg, iov_pa, iov_size);
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cmd->iov_size = iov_size;
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cmd->iov_size = iov_size;
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return cmd->iov_size;
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return cmd->iov_size;
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@ -660,6 +664,7 @@ static void megasas_finish_dcmd(MegasasCmd *cmd, uint32_t iov_size)
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static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd)
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static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd)
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{
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{
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PCIDevice *pci_dev = PCI_DEVICE(s);
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struct mfi_ctrl_info info;
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struct mfi_ctrl_info info;
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size_t dcmd_size = sizeof(info);
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size_t dcmd_size = sizeof(info);
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BusChild *kid;
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BusChild *kid;
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@ -710,11 +715,11 @@ static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd)
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memcpy(info.image_component[0].build_date, __DATE__, 11);
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memcpy(info.image_component[0].build_date, __DATE__, 11);
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memcpy(info.image_component[0].build_time, __TIME__, 8);
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memcpy(info.image_component[0].build_time, __TIME__, 8);
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info.image_component_count = 1;
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info.image_component_count = 1;
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if (s->dev.has_rom) {
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if (pci_dev->has_rom) {
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uint8_t biosver[32];
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uint8_t biosver[32];
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uint8_t *ptr;
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uint8_t *ptr;
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ptr = memory_region_get_ram_ptr(&s->dev.rom);
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ptr = memory_region_get_ram_ptr(&pci_dev->rom);
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memcpy(biosver, ptr + 0x41, 31);
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memcpy(biosver, ptr + 0x41, 31);
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memcpy(info.image_component[1].name, "BIOS", 4);
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memcpy(info.image_component[1].name, "BIOS", 4);
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memcpy(info.image_component[1].version, biosver,
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memcpy(info.image_component[1].version, biosver,
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@ -1905,6 +1910,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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uint64_t val, unsigned size)
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{
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{
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MegasasState *s = opaque;
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MegasasState *s = opaque;
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PCIDevice *pci_dev = PCI_DEVICE(s);
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uint64_t frame_addr;
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uint64_t frame_addr;
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uint32_t frame_count;
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uint32_t frame_count;
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int i;
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int i;
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@ -1928,9 +1934,9 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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break;
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break;
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case MFI_OMSK:
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case MFI_OMSK:
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s->intr_mask = val;
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s->intr_mask = val;
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if (!megasas_intr_enabled(s) && !msix_enabled(&s->dev)) {
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if (!megasas_intr_enabled(s) && !msix_enabled(pci_dev)) {
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trace_megasas_irq_lower();
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trace_megasas_irq_lower();
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qemu_irq_lower(s->dev.irq[0]);
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qemu_irq_lower(pci_dev->irq[0]);
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}
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}
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if (megasas_intr_enabled(s)) {
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if (megasas_intr_enabled(s)) {
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trace_megasas_intr_enabled();
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trace_megasas_intr_enabled();
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@ -1944,9 +1950,9 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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/* Update reply queue pointer */
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/* Update reply queue pointer */
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trace_megasas_qf_update(s->reply_queue_head, s->busy);
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trace_megasas_qf_update(s->reply_queue_head, s->busy);
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stl_le_phys(s->producer_pa, s->reply_queue_head);
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stl_le_phys(s->producer_pa, s->reply_queue_head);
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if (!msix_enabled(&s->dev)) {
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if (!msix_enabled(pci_dev)) {
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trace_megasas_irq_lower();
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trace_megasas_irq_lower();
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qemu_irq_lower(s->dev.irq[0]);
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qemu_irq_lower(pci_dev->irq[0]);
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}
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}
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}
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}
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break;
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break;
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@ -2055,7 +2061,7 @@ static const VMStateDescription vmstate_megasas = {
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.minimum_version_id = 0,
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.minimum_version_id = 0,
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.minimum_version_id_old = 0,
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.minimum_version_id_old = 0,
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.fields = (VMStateField[]) {
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(dev, MegasasState),
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VMSTATE_PCI_DEVICE(parent_obj, MegasasState),
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VMSTATE_INT32(fw_state, MegasasState),
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VMSTATE_INT32(fw_state, MegasasState),
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VMSTATE_INT32(intr_mask, MegasasState),
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VMSTATE_INT32(intr_mask, MegasasState),
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@ -2072,7 +2078,7 @@ static void megasas_scsi_uninit(PCIDevice *d)
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MegasasState *s = MEGASAS(d);
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MegasasState *s = MEGASAS(d);
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#ifdef USE_MSIX
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#ifdef USE_MSIX
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msix_uninit(&s->dev, &s->mmio_io);
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msix_uninit(d, &s->mmio_io);
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#endif
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#endif
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memory_region_destroy(&s->mmio_io);
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memory_region_destroy(&s->mmio_io);
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memory_region_destroy(&s->port_io);
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memory_region_destroy(&s->port_io);
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@ -2096,7 +2102,7 @@ static int megasas_scsi_init(PCIDevice *dev)
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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int i, bar_type;
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int i, bar_type;
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pci_conf = s->dev.config;
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pci_conf = dev->config;
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/* PCI latency timer = 0 */
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/* PCI latency timer = 0 */
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pci_conf[PCI_LATENCY_TIMER] = 0;
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pci_conf[PCI_LATENCY_TIMER] = 0;
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@ -2113,7 +2119,7 @@ static int megasas_scsi_init(PCIDevice *dev)
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#ifdef USE_MSIX
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#ifdef USE_MSIX
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/* MSI-X support is currently broken */
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/* MSI-X support is currently broken */
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if (megasas_use_msix(s) &&
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if (megasas_use_msix(s) &&
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msix_init(&s->dev, 15, &s->mmio_io, 0, 0x2000)) {
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msix_init(dev, 15, &s->mmio_io, 0, 0x2000)) {
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s->flags &= ~MEGASAS_MASK_USE_MSIX;
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s->flags &= ~MEGASAS_MASK_USE_MSIX;
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}
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}
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#else
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#else
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@ -2121,12 +2127,12 @@ static int megasas_scsi_init(PCIDevice *dev)
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#endif
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#endif
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bar_type = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64;
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bar_type = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64;
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pci_register_bar(&s->dev, 0, bar_type, &s->mmio_io);
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pci_register_bar(dev, 0, bar_type, &s->mmio_io);
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pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &s->port_io);
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pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &s->port_io);
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pci_register_bar(&s->dev, 3, bar_type, &s->queue_io);
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pci_register_bar(dev, 3, bar_type, &s->queue_io);
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if (megasas_use_msix(s)) {
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if (megasas_use_msix(s)) {
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msix_vector_use(&s->dev, 0);
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msix_vector_use(dev, 0);
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}
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}
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if (!s->sas_addr) {
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if (!s->sas_addr) {
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