RISC-V: Mark mstatus.fs dirty
Modifed from Richard Henderson's patch [1] to integrate with the new control and status register implementation. [1] https://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg07034.html Note: the f* CSRs already mark mstatus.FS dirty using env->mstatus |= mstatus.FS so the bug in the first spin of this patch has been fixed in a prior commit. Signed-off-by: Michael Clark <mjc@sifive.com> Reviewed-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Co-authored-by: Richard Henderson <richard.henderson@linaro.org> Co-authored-by: Michael Clark <mjc@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -317,18 +317,6 @@ static int write_mstatus(CPURISCVState *env, int csrno, target_ulong val)
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mstatus = (mstatus & ~mask) | (val & mask);
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/* Note: this is a workaround for an issue where mstatus.FS
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does not report dirty after floating point operations
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that modify floating point state. This workaround is
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technically compliant with the RISC-V Privileged
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specification as it is legal to return only off, or dirty.
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at the expense of extra floating point save/restore. */
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/* FP is always dirty or off */
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if (mstatus & MSTATUS_FS) {
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mstatus |= MSTATUS_FS;
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}
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int dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) |
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((mstatus & MSTATUS_XS) == MSTATUS_XS);
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mstatus = set_field(mstatus, MSTATUS_SD, dirty);
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@ -651,6 +651,31 @@ static void gen_store(DisasContext *ctx, uint32_t opc, int rs1, int rs2,
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tcg_temp_free(dat);
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}
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#ifndef CONFIG_USER_ONLY
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/* The states of mstatus_fs are:
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* 0 = disabled, 1 = initial, 2 = clean, 3 = dirty
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* We will have already diagnosed disabled state,
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* and need to turn initial/clean into dirty.
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*/
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static void mark_fs_dirty(DisasContext *ctx)
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{
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TCGv tmp;
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if (ctx->mstatus_fs == MSTATUS_FS) {
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return;
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}
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/* Remember the state change for the rest of the TB. */
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ctx->mstatus_fs = MSTATUS_FS;
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tmp = tcg_temp_new();
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tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
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tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS);
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tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
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tcg_temp_free(tmp);
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}
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#else
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static inline void mark_fs_dirty(DisasContext *ctx) { }
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#endif
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static void gen_fp_load(DisasContext *ctx, uint32_t opc, int rd,
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int rs1, target_long imm)
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{
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@ -679,6 +704,8 @@ static void gen_fp_load(DisasContext *ctx, uint32_t opc, int rd,
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break;
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}
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tcg_temp_free(t0);
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mark_fs_dirty(ctx);
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}
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static void gen_fp_store(DisasContext *ctx, uint32_t opc, int rs1,
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@ -944,6 +971,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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int rs1, int rs2, int rm)
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{
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TCGv t0 = NULL;
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bool fp_output = true;
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if (ctx->mstatus_fs == 0) {
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goto do_illegal;
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@ -1006,6 +1034,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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}
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gen_set_gpr(rd, t0);
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tcg_temp_free(t0);
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fp_output = false;
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break;
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case OPC_RISC_FCVT_W_S:
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@ -1035,6 +1064,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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}
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gen_set_gpr(rd, t0);
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tcg_temp_free(t0);
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fp_output = false;
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break;
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case OPC_RISC_FCVT_S_W:
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@ -1085,6 +1115,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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}
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gen_set_gpr(rd, t0);
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tcg_temp_free(t0);
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fp_output = false;
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break;
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case OPC_RISC_FMV_S_X:
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@ -1177,6 +1208,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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}
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gen_set_gpr(rd, t0);
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tcg_temp_free(t0);
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fp_output = false;
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break;
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case OPC_RISC_FCVT_W_D:
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@ -1206,6 +1238,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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}
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gen_set_gpr(rd, t0);
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tcg_temp_free(t0);
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fp_output = false;
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break;
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case OPC_RISC_FCVT_D_W:
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@ -1254,6 +1287,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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default:
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goto do_illegal;
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}
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fp_output = false;
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break;
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#if defined(TARGET_RISCV64)
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@ -1271,7 +1305,11 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd,
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tcg_temp_free(t0);
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}
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gen_exception_illegal(ctx);
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break;
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return;
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}
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if (fp_output) {
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mark_fs_dirty(ctx);
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}
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}
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