target/arm: handle A-profile semihosting at translate time
As for the other semihosting calls we can resolve this at translate time. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190913151845.12582-4-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -10222,14 +10222,25 @@ static bool trans_CBZ(DisasContext *s, arg_CBZ *a)
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}
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/*
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* Supervisor call
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* Supervisor call - both T32 & A32 come here so we need to check
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* which mode we are in when checking for semihosting.
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*/
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static bool trans_SVC(DisasContext *s, arg_SVC *a)
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{
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gen_set_pc_im(s, s->base.pc_next);
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s->svc_imm = a->imm;
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s->base.is_jmp = DISAS_SWI;
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const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456;
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if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled() &&
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#ifndef CONFIG_USER_ONLY
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!IS_USER(s) &&
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#endif
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(a->imm == semihost_imm)) {
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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} else {
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gen_set_pc_im(s, s->base.pc_next);
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s->svc_imm = a->imm;
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s->base.is_jmp = DISAS_SWI;
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}
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return true;
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}
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