target/ppc: Fix comment for MSR_FE{0,1}
As per hreg_compute_hflags: We 'forget' FE0 & FE1: we'll never generate imprecise exceptions remove the hflags marker from the respective comments. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210315184615.1985590-7-richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -322,13 +322,13 @@ typedef struct ppc_v3_pate_t {
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#define MSR_PR 14 /* Problem state hflags */
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#define MSR_FP 13 /* Floating point available hflags */
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#define MSR_ME 12 /* Machine check interrupt enable */
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#define MSR_FE0 11 /* Floating point exception mode 0 hflags */
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#define MSR_FE0 11 /* Floating point exception mode 0 */
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#define MSR_SE 10 /* Single-step trace enable x hflags */
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#define MSR_DWE 10 /* Debug wait enable on 405 x */
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#define MSR_UBLE 10 /* User BTB lock enable on e500 x */
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#define MSR_BE 9 /* Branch trace enable x hflags */
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#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC x */
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#define MSR_FE1 8 /* Floating point exception mode 1 hflags */
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#define MSR_FE1 8 /* Floating point exception mode 1 */
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#define MSR_AL 7 /* AL bit on POWER */
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#define MSR_EP 6 /* Exception prefix on 601 */
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#define MSR_IR 5 /* Instruction relocate */
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