haraldwolff/qemu-patch-raspberry4
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Fix PowerPC targets compilation on 32 bits hosts:

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now that the SPE extension is available for all targets,
 we always need to have some 64 bits temporary registers.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3647 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-11-14 18:45:52 +00:00
parent d2fd1af767
commit 57c26279c7
2 changed files with 5 additions and 5 deletions
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6
target-ppc/cpu.h
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@ -520,11 +520,11 @@ struct CPUPPCState {
/* First are the most commonly used resources /* First are the most commonly used resources
* during translated code execution * during translated code execution
*/ */
#if TARGET_GPR_BITS > HOST_LONG_BITS #if (HOST_LONG_BITS == 32)
/* temporary fixed-point registers /* temporary fixed-point registers
* used to emulate 64 bits target on 32 bits hosts * used to emulate 64 bits registers on 32 bits hosts
*/ */
ppc_gpr_t t0, t1, t2; uint64_t t0, t1, t2;
#endif #endif
ppc_avr_t avr0, avr1, avr2; ppc_avr_t avr0, avr1, avr2;

4
target-ppc/exec.h
View file

@ -42,8 +42,8 @@ register unsigned long T0 asm(AREG1);
register unsigned long T1 asm(AREG2); register unsigned long T1 asm(AREG2);
register unsigned long T2 asm(AREG3); register unsigned long T2 asm(AREG3);
#endif #endif
/* We may, sometime, need 64 bits registers on 32 bits target */ /* We may, sometime, need 64 bits registers on 32 bits targets */
#if TARGET_GPR_BITS > HOST_LONG_BITS #if (HOST_LONG_BITS == 32)
/* no registers can be used */ /* no registers can be used */
#define T0_64 (env->t0) #define T0_64 (env->t0)
#define T1_64 (env->t1) #define T1_64 (env->t1)