ppc: Fix OpenPIC model
Apple uses an IBM MPIC2A without timers, it has 64 sources. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -92,6 +92,16 @@ static int get_current_cpu(void);
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#define RAVEN_MAX_TMR OPENPIC_MAX_TMR
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#define RAVEN_MAX_IPI OPENPIC_MAX_IPI
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/* KeyLargo */
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#define KEYLARGO_MAX_CPU 4
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#define KEYLARGO_MAX_EXT 64
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#define KEYLARGO_MAX_IPI 4
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#define KEYLARGO_MAX_IRQ (64 + KEYLARGO_MAX_IPI)
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#define KEYLARGO_MAX_TMR 0
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#define KEYLARGO_IPI_IRQ (KEYLARGO_MAX_EXT) /* First IPI IRQ */
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/* Timers don't exist but this makes the code happy... */
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#define KEYLARGO_TMR_IRQ (KEYLARGO_IPI_IRQ + KEYLARGO_MAX_IPI)
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/* Interrupt definitions */
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#define RAVEN_FE_IRQ (RAVEN_MAX_EXT) /* Internal functional IRQ */
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#define RAVEN_ERR_IRQ (RAVEN_MAX_EXT + 1) /* Error IRQ */
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@ -120,6 +130,7 @@ static FslMpicInfo fsl_mpic_42 = {
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#define VID_REVISION_1_3 3
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#define VIR_GENERIC 0x00000000 /* Generic Vendor ID */
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#define VIR_MPIC2A 0x00004614 /* IBM MPIC-2A */
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#define GCR_RESET 0x80000000
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#define GCR_MODE_PASS 0x00000000
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@ -329,6 +340,8 @@ typedef struct OpenPICState {
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uint32_t nb_cpus;
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/* Timer registers */
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OpenPICTimer timers[OPENPIC_MAX_TMR];
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uint32_t max_tmr;
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/* Shared MSI registers */
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OpenPICMSI msi[MAX_MSI];
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uint32_t max_irq;
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@ -1715,6 +1728,28 @@ static void openpic_realize(DeviceState *dev, Error **errp)
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return;
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}
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map_list(opp, list_le, &list_count);
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break;
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case OPENPIC_MODEL_KEYLARGO:
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opp->nb_irqs = KEYLARGO_MAX_EXT;
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opp->vid = VID_REVISION_1_2;
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opp->vir = VIR_GENERIC;
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opp->vector_mask = 0xFF;
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opp->tfrr_reset = 4160000;
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opp->ivpr_reset = IVPR_MASK_MASK | IVPR_MODE_MASK;
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opp->idr_reset = 0;
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opp->max_irq = KEYLARGO_MAX_IRQ;
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opp->irq_ipi0 = KEYLARGO_IPI_IRQ;
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opp->irq_tim0 = KEYLARGO_TMR_IRQ;
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opp->brr1 = -1;
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opp->mpic_mode_mask = GCR_MODE_MIXED;
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if (opp->nb_cpus != 1) {
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error_setg(errp, "Only UP supported today");
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return;
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}
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map_list(opp, list_le, &list_count);
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break;
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}
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@ -342,7 +342,7 @@ static void ppc_core99_init(MachineState *machine)
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pic = g_new0(qemu_irq, 64);
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dev = qdev_create(NULL, TYPE_OPENPIC);
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qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_RAVEN);
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qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_KEYLARGO);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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pic_mem = s->mmio[0].memory;
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@ -20,6 +20,7 @@ enum {
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#define OPENPIC_MODEL_RAVEN 0
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#define OPENPIC_MODEL_FSL_MPIC_20 1
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#define OPENPIC_MODEL_FSL_MPIC_42 2
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#define OPENPIC_MODEL_KEYLARGO 3
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#define OPENPIC_MAX_SRC 256
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#define OPENPIC_MAX_TMR 4
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