trivial patches for 2015-04-04
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJVH43FAAoJEL7lnXSkw9fbL0IIAJLyad9F5HRaakwfXIaMEj8F ICmMOn+XDyErG9Jqdai//TPix0btlGjDLpJ3EZGWWrvUPkO/RkkTz+ykW+FJdaU5 6UcwaUcwsYLWxk8Wl/S6Bb0G1/wi4gLp+BQCRVC4ZSnDZAQwwGFOz74bfXaIjCcB +WX7ETxf47Sx1IY6XSF8dieitJ494pRtLEFMbN5YktnGBq792cMJnqdqVP76B62V rgD3W+qandblgXCtRVLhbUYXxzPsepYEtBrdfcjLk4utECkWwrsVHFhfjyAbwqTX Q7BWZWy7164BcdHrQYKFzg5XE7K9RICkWl/FESR/bAbC7FjAKU7fw3wwRRe1z5Q= =PAe9 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-04-04' into staging trivial patches for 2015-04-04 # gpg: Signature made Sat Apr 4 08:07:49 2015 BST using RSA key ID A4C3D7DB # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" * remotes/mjt/tags/pull-trivial-patches-2015-04-04: vhost: fix typo in vq_index description gitignore: Ignore more .pod files. target-tricore: Fix check which was always false target-i386: remove superfluous TARGET_HAS_SMC macro pcspk: Fix I/O port name Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
5a24f20a72
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.gitignore
vendored
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.gitignore
vendored
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@ -37,14 +37,8 @@
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/qemu-tech.html
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/qemu-doc.info
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/qemu-tech.info
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/qemu.1
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/qemu.pod
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/qemu-img.1
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/qemu-img.pod
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/qemu-img
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/qemu-nbd
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/qemu-nbd.8
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/qemu-nbd.pod
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/qemu-options.def
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/qemu-options.texi
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/qemu-img-cmds.texi
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@ -56,8 +50,7 @@
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/qmp-commands.txt
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/vscclient
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/fsdev/virtfs-proxy-helper
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/fsdev/virtfs-proxy-helper.1
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/fsdev/virtfs-proxy-helper.pod
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*.[1-9]
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*.a
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*.aux
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*.cp
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@ -70,6 +63,7 @@
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*.ky
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*.log
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*.pdf
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*.pod
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*.cps
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*.fns
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*.kys
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@ -167,7 +167,7 @@ static void pcspk_initfn(Object *obj)
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{
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PCSpkState *s = PC_SPEAKER(obj);
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memory_region_init_io(&s->ioport, OBJECT(s), &pcspk_io_ops, s, "elcr", 1);
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memory_region_init_io(&s->ioport, OBJECT(s), &pcspk_io_ops, s, "pcspk", 1);
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}
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static void pcspk_realizefn(DeviceState *dev, Error **errp)
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@ -36,7 +36,7 @@ struct vhost_dev {
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MemoryRegionSection *mem_sections;
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struct vhost_virtqueue *vqs;
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int nvqs;
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/* the first virtuque which would be used by this vhost dev */
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/* the first virtqueue which would be used by this vhost dev */
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int vq_index;
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unsigned long long features;
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unsigned long long acked_features;
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@ -31,8 +31,6 @@
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/* Maximum instruction code size */
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#define TARGET_MAX_INSN_SIZE 16
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/* target supports implicit self modifying code */
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#define TARGET_HAS_SMC
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/* support for self modifying code even if the modified instruction is
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close to the modifying instruction */
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#define TARGET_HAS_PRECISE_SMC
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@ -2573,7 +2573,7 @@ void helper_rslcx(CPUTriCoreState *env)
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/* CSU trap */
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}
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/* if (PCXI.UL == 1) then trap(CTYP); */
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if ((env->PCXI & MASK_PCXI_UL) == 1) {
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if ((env->PCXI & MASK_PCXI_UL) != 0) {
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/* CTYP trap */
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}
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/* EA = {PCXI.PCXS, 6'b0, PCXI.PCXO, 6'b0}; */
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@ -1334,8 +1334,6 @@ static inline void tb_alloc_page(TranslationBlock *tb,
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p->first_tb = (TranslationBlock *)((uintptr_t)tb | n);
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invalidate_page_bitmap(p);
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#if defined(TARGET_HAS_SMC) || 1
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#if defined(CONFIG_USER_ONLY)
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if (p->flags & PAGE_WRITE) {
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target_ulong addr;
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@ -1371,8 +1369,6 @@ static inline void tb_alloc_page(TranslationBlock *tb,
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tlb_protect_code(page_addr);
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}
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#endif
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#endif /* TARGET_HAS_SMC */
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}
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/* add a new TB and link it to the physical page tables. phys_page2 is
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