target-arm queue:
* hw/arm/bcm2836: Remove unused 'cpu_type' field * target/arm: Fix mtedesc for do_mem_zpz * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7 * target/arm: Don't do raw writes for PMINTENCLR * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() * build: Fix various issues with building on Haiku * target/nios2: fix wrctl behaviour when using icount * hw/arm/tosa: Encapsulate misc GPIO handling in a device * hw/arm/palm.c: Encapsulate misc GPIO handling in a device * hw/arm/aspeed: Do not create and attach empty SD cards by default -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl8MatAZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3uWHD/948wb0jmdMdAKVpmzGG7Zp aRQpWnrDRlB5i0yq326FPggIMcdGGvCBDTBaxfD6ToBAfii5lyiJcekBJsJ/ezbS YzoC+C0ZfsL87C4j7eajBkhLETPoykkXBjYC87zduFLcMIpSwZS936mzKKave+0/ 5R8/VGlGDfV9RQw0bn/bsz5H20XVYnk68ykzJdkjTy71+DH6r4/juVFwSom+zH7b rUYoyl6aYfTOiSZVeSKcSS1AU5vj9UCMwiiMumVfFM/NSDawCP8uiR7T2VtRTvyJ 84Dw4YhgUMMYWQf+4UGt9lAijp65p3IsS7aP5F/5MEzU3HbVY62tccrqcuJtRwUf roGyNvsLurtEBfYte++Y2/+aacBkRdyqOBofYWBnY1MSKunZNSvVxNrwdCTsTNdW 7r1QL862/5LoP3DbWFMeAMHcVceQzvQNkK1re/CmCXOEBazBNR0Vi0bEMBjFjVhu c2C4ywEOTU5aSfvYHcG6fU+iqhhBdAt/YP3u4d9kMqV5BX4k+3nb1VRCkOQfYGwE QTzoaIExAhDFb0aW6uR+48+5r2PBzNc9Dif1SwA5NM+f+77phdLde/K+lJbJ8tXg V5ZpeiXP7wz6y8+KVADibFVcy1d3fqw5/Yi8TSoSw+d/dQRKd/LRHB2Ig/R9mBp/ sXdYKhEWwoq+jPmsTs8GsQ== =wxo7 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200713' into staging target-arm queue: * hw/arm/bcm2836: Remove unused 'cpu_type' field * target/arm: Fix mtedesc for do_mem_zpz * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7 * target/arm: Don't do raw writes for PMINTENCLR * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() * build: Fix various issues with building on Haiku * target/nios2: fix wrctl behaviour when using icount * hw/arm/tosa: Encapsulate misc GPIO handling in a device * hw/arm/palm.c: Encapsulate misc GPIO handling in a device * hw/arm/aspeed: Do not create and attach empty SD cards by default # gpg: Signature made Mon 13 Jul 2020 15:08:16 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200713: (25 commits) hw/arm/aspeed: Do not create and attach empty SD cards by default hw/arm/palm.c: Encapsulate misc GPIO handling in a device hw/arm/palm.c: Detabify hw/arm/tosa: Encapsulate misc GPIO handling in a device hw/arm/tosa.c: Detabify hw/nios2: exit to main CPU loop only when unmasking interrupts target/nios2: Use gen_io_start around wrctl instruction target/nios2: in line the semantics of DISAS_UPDATE with other targets target/nios2: add DISAS_NORETURN case for nothing more to generate util/drm: make portable by avoiding struct dirent d_type util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD bswap.h: Include <endian.h> on Haiku for bswap operations osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL osdep.h: Always include <sys/signal.h> if it exists build: Check that mlockall() exists util/qemu-openpty.c: Don't assume pty.h is glibc-only build: Enable BSD symbols for Haiku virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() target/arm: Don't do raw writes for PMINTENCLR ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
5c65b1f135
38
configure
vendored
38
configure
vendored
|
@ -904,8 +904,8 @@ SunOS)
|
|||
;;
|
||||
Haiku)
|
||||
haiku="yes"
|
||||
QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS $QEMU_CFLAGS"
|
||||
LIBS="-lposix_error_mapper -lnetwork $LIBS"
|
||||
QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS -DBSD_SOURCE $QEMU_CFLAGS"
|
||||
LIBS="-lposix_error_mapper -lnetwork -lbsd $LIBS"
|
||||
;;
|
||||
Linux)
|
||||
audio_drv_list="try-pa oss"
|
||||
|
@ -2402,6 +2402,24 @@ else
|
|||
l2tpv3=no
|
||||
fi
|
||||
|
||||
if check_include "pty.h" ; then
|
||||
pty_h=yes
|
||||
else
|
||||
pty_h=no
|
||||
fi
|
||||
|
||||
cat > $TMPC <<EOF
|
||||
#include <sys/mman.h>
|
||||
int main(int argc, char *argv[]) {
|
||||
return mlockall(MCL_FUTURE);
|
||||
}
|
||||
EOF
|
||||
if compile_prog "" "" ; then
|
||||
have_mlockall=yes
|
||||
else
|
||||
have_mlockall=no
|
||||
fi
|
||||
|
||||
#########################################
|
||||
# vhost interdependencies and host support
|
||||
|
||||
|
@ -3226,6 +3244,13 @@ if check_include "libdrm/drm.h" ; then
|
|||
have_drm_h=yes
|
||||
fi
|
||||
|
||||
#########################################
|
||||
# sys/signal.h check
|
||||
have_sys_signal_h=no
|
||||
if check_include "sys/signal.h" ; then
|
||||
have_sys_signal_h=yes
|
||||
fi
|
||||
|
||||
##########################################
|
||||
# VTE probe
|
||||
|
||||
|
@ -7415,6 +7440,9 @@ fi
|
|||
if test "$have_openpty" = "yes" ; then
|
||||
echo "HAVE_OPENPTY=y" >> $config_host_mak
|
||||
fi
|
||||
if test "$have_sys_signal_h" = "yes" ; then
|
||||
echo "HAVE_SYS_SIGNAL_H=y" >> $config_host_mak
|
||||
fi
|
||||
|
||||
# Work around a system header bug with some kernel/XFS header
|
||||
# versions where they both try to define 'struct fsxattr':
|
||||
|
@ -7893,6 +7921,12 @@ fi
|
|||
if test "$sheepdog" = "yes" ; then
|
||||
echo "CONFIG_SHEEPDOG=y" >> $config_host_mak
|
||||
fi
|
||||
if test "$pty_h" = "yes" ; then
|
||||
echo "HAVE_PTY_H=y" >> $config_host_mak
|
||||
fi
|
||||
if test "$have_mlockall" = "yes" ; then
|
||||
echo "HAVE_MLOCKALL=y" >> $config_host_mak
|
||||
fi
|
||||
if test "$fuzzing" = "yes" ; then
|
||||
if test "$have_fuzzer" = "yes"; then
|
||||
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
|
||||
|
|
|
@ -246,11 +246,12 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
|
|||
{
|
||||
DeviceState *card;
|
||||
|
||||
card = qdev_new(TYPE_SD_CARD);
|
||||
if (dinfo) {
|
||||
qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
|
||||
&error_fatal);
|
||||
if (!dinfo) {
|
||||
return;
|
||||
}
|
||||
card = qdev_new(TYPE_SD_CARD);
|
||||
qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
|
||||
&error_fatal);
|
||||
qdev_realize_and_unref(card,
|
||||
qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
|
||||
&error_fatal);
|
||||
|
|
|
@ -171,6 +171,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
|
|||
epit_table[i].irq));
|
||||
}
|
||||
|
||||
object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err);
|
||||
qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
|
||||
|
||||
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) {
|
||||
|
@ -315,10 +316,16 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
|
|||
&s->iram_alias);
|
||||
}
|
||||
|
||||
static Property fsl_imx25_properties[] = {
|
||||
DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
};
|
||||
|
||||
static void fsl_imx25_class_init(ObjectClass *oc, void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(oc);
|
||||
|
||||
device_class_set_props(dc, fsl_imx25_properties);
|
||||
dc->realize = fsl_imx25_realize;
|
||||
dc->desc = "i.MX25 SOC";
|
||||
/*
|
||||
|
|
|
@ -377,6 +377,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
|
|||
spi_table[i].irq));
|
||||
}
|
||||
|
||||
object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err);
|
||||
qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
|
||||
if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) {
|
||||
return;
|
||||
|
@ -449,10 +450,16 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
|
|||
&s->ocram_alias);
|
||||
}
|
||||
|
||||
static Property fsl_imx6_properties[] = {
|
||||
DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
};
|
||||
|
||||
static void fsl_imx6_class_init(ObjectClass *oc, void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(oc);
|
||||
|
||||
device_class_set_props(dc, fsl_imx6_properties);
|
||||
dc->realize = fsl_imx6_realize;
|
||||
dc->desc = "i.MX6 SOC";
|
||||
/* Reason: Uses serial_hd() in the realize() function */
|
||||
|
|
|
@ -363,6 +363,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
|
|||
FSL_IMX7_ENET2_ADDR,
|
||||
};
|
||||
|
||||
object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
|
||||
s->phy_num[i], &error_abort);
|
||||
object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
|
||||
FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
|
||||
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
|
||||
|
@ -550,10 +552,17 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
|
|||
FSL_IMX7_PCIE_PHY_SIZE);
|
||||
}
|
||||
|
||||
static Property fsl_imx7_properties[] = {
|
||||
DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
|
||||
DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
};
|
||||
|
||||
static void fsl_imx7_class_init(ObjectClass *oc, void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(oc);
|
||||
|
||||
device_class_set_props(dc, fsl_imx7_properties);
|
||||
dc->realize = fsl_imx7_realize;
|
||||
|
||||
/* Reason: Uses serial_hds and nd_table in realize() directly */
|
||||
|
|
111
hw/arm/palm.c
111
hw/arm/palm.c
|
@ -61,21 +61,21 @@ static const MemoryRegionOps static_ops = {
|
|||
/* Palm Tunsgten|E support */
|
||||
|
||||
/* Shared GPIOs */
|
||||
#define PALMTE_USBDETECT_GPIO 0
|
||||
#define PALMTE_USB_OR_DC_GPIO 1
|
||||
#define PALMTE_TSC_GPIO 4
|
||||
#define PALMTE_PINTDAV_GPIO 6
|
||||
#define PALMTE_MMC_WP_GPIO 8
|
||||
#define PALMTE_MMC_POWER_GPIO 9
|
||||
#define PALMTE_HDQ_GPIO 11
|
||||
#define PALMTE_HEADPHONES_GPIO 14
|
||||
#define PALMTE_SPEAKER_GPIO 15
|
||||
#define PALMTE_USBDETECT_GPIO 0
|
||||
#define PALMTE_USB_OR_DC_GPIO 1
|
||||
#define PALMTE_TSC_GPIO 4
|
||||
#define PALMTE_PINTDAV_GPIO 6
|
||||
#define PALMTE_MMC_WP_GPIO 8
|
||||
#define PALMTE_MMC_POWER_GPIO 9
|
||||
#define PALMTE_HDQ_GPIO 11
|
||||
#define PALMTE_HEADPHONES_GPIO 14
|
||||
#define PALMTE_SPEAKER_GPIO 15
|
||||
/* MPU private GPIOs */
|
||||
#define PALMTE_DC_GPIO 2
|
||||
#define PALMTE_MMC_SWITCH_GPIO 4
|
||||
#define PALMTE_MMC1_GPIO 6
|
||||
#define PALMTE_MMC2_GPIO 7
|
||||
#define PALMTE_MMC3_GPIO 11
|
||||
#define PALMTE_DC_GPIO 2
|
||||
#define PALMTE_MMC_SWITCH_GPIO 4
|
||||
#define PALMTE_MMC1_GPIO 6
|
||||
#define PALMTE_MMC2_GPIO 7
|
||||
#define PALMTE_MMC3_GPIO 11
|
||||
|
||||
static MouseTransformInfo palmte_pointercal = {
|
||||
.x = 320,
|
||||
|
@ -100,17 +100,17 @@ static struct {
|
|||
int column;
|
||||
} palmte_keymap[0x80] = {
|
||||
[0 ... 0x7f] = { -1, -1 },
|
||||
[0x3b] = { 0, 0 }, /* F1 -> Calendar */
|
||||
[0x3c] = { 1, 0 }, /* F2 -> Contacts */
|
||||
[0x3d] = { 2, 0 }, /* F3 -> Tasks List */
|
||||
[0x3e] = { 3, 0 }, /* F4 -> Note Pad */
|
||||
[0x01] = { 4, 0 }, /* Esc -> Power */
|
||||
[0x4b] = { 0, 1 }, /* Left */
|
||||
[0x50] = { 1, 1 }, /* Down */
|
||||
[0x48] = { 2, 1 }, /* Up */
|
||||
[0x4d] = { 3, 1 }, /* Right */
|
||||
[0x4c] = { 4, 1 }, /* Centre */
|
||||
[0x39] = { 4, 1 }, /* Spc -> Centre */
|
||||
[0x3b] = { 0, 0 }, /* F1 -> Calendar */
|
||||
[0x3c] = { 1, 0 }, /* F2 -> Contacts */
|
||||
[0x3d] = { 2, 0 }, /* F3 -> Tasks List */
|
||||
[0x3e] = { 3, 0 }, /* F4 -> Note Pad */
|
||||
[0x01] = { 4, 0 }, /* Esc -> Power */
|
||||
[0x4b] = { 0, 1 }, /* Left */
|
||||
[0x50] = { 1, 1 }, /* Down */
|
||||
[0x48] = { 2, 1 }, /* Up */
|
||||
[0x4d] = { 3, 1 }, /* Right */
|
||||
[0x4c] = { 4, 1 }, /* Centre */
|
||||
[0x39] = { 4, 1 }, /* Spc -> Centre */
|
||||
};
|
||||
|
||||
static void palmte_button_event(void *opaque, int keycode)
|
||||
|
@ -124,6 +124,21 @@ static void palmte_button_event(void *opaque, int keycode)
|
|||
!(keycode & 0x80));
|
||||
}
|
||||
|
||||
/*
|
||||
* Encapsulation of some GPIO line behaviour for the Palm board
|
||||
*
|
||||
* QEMU interface:
|
||||
* + unnamed GPIO inputs 0..6: for the various miscellaneous input lines
|
||||
*/
|
||||
|
||||
#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
|
||||
#define PALM_MISC_GPIO(obj) \
|
||||
OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO)
|
||||
|
||||
typedef struct PalmMiscGPIOState {
|
||||
SysBusDevice parent_obj;
|
||||
} PalmMiscGPIOState;
|
||||
|
||||
static void palmte_onoff_gpios(void *opaque, int line, int level)
|
||||
{
|
||||
switch (line) {
|
||||
|
@ -151,23 +166,44 @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
|
|||
}
|
||||
}
|
||||
|
||||
static void palm_misc_gpio_init(Object *obj)
|
||||
{
|
||||
DeviceState *dev = DEVICE(obj);
|
||||
|
||||
qdev_init_gpio_in(dev, palmte_onoff_gpios, 7);
|
||||
}
|
||||
|
||||
static const TypeInfo palm_misc_gpio_info = {
|
||||
.name = TYPE_PALM_MISC_GPIO,
|
||||
.parent = TYPE_SYS_BUS_DEVICE,
|
||||
.instance_size = sizeof(PalmMiscGPIOState),
|
||||
.instance_init = palm_misc_gpio_init,
|
||||
/*
|
||||
* No class init required: device has no internal state so does not
|
||||
* need to set up reset or vmstate, and has no realize method.
|
||||
*/
|
||||
};
|
||||
|
||||
static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
|
||||
{
|
||||
qemu_irq *misc_gpio;
|
||||
DeviceState *misc_gpio;
|
||||
|
||||
misc_gpio = sysbus_create_simple(TYPE_PALM_MISC_GPIO, -1, NULL);
|
||||
|
||||
omap_mmc_handlers(cpu->mmc,
|
||||
qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO),
|
||||
qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio)
|
||||
[PALMTE_MMC_SWITCH_GPIO]));
|
||||
|
||||
misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
|
||||
qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
|
||||
qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
|
||||
qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
|
||||
qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
|
||||
qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
|
||||
omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
|
||||
omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
|
||||
qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,
|
||||
qdev_get_gpio_in(misc_gpio, 0));
|
||||
qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,
|
||||
qdev_get_gpio_in(misc_gpio, 1));
|
||||
qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2));
|
||||
qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3));
|
||||
qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4));
|
||||
omap_mpuio_out_set(cpu->mpuio, 1, qdev_get_gpio_in(misc_gpio, 5));
|
||||
omap_mpuio_out_set(cpu->mpuio, 3, qdev_get_gpio_in(misc_gpio, 6));
|
||||
|
||||
/* Reset some inputs to initial state. */
|
||||
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
|
||||
|
@ -276,3 +312,10 @@ static void palmte_machine_init(MachineClass *mc)
|
|||
}
|
||||
|
||||
DEFINE_MACHINE("cheetah", palmte_machine_init)
|
||||
|
||||
static void palm_register_types(void)
|
||||
{
|
||||
type_register_static(&palm_misc_gpio_info);
|
||||
}
|
||||
|
||||
type_init(palm_register_types)
|
||||
|
|
132
hw/arm/tosa.c
132
hw/arm/tosa.c
|
@ -26,32 +26,32 @@
|
|||
#include "hw/sysbus.h"
|
||||
#include "exec/address-spaces.h"
|
||||
|
||||
#define TOSA_RAM 0x04000000
|
||||
#define TOSA_ROM 0x00800000
|
||||
#define TOSA_RAM 0x04000000
|
||||
#define TOSA_ROM 0x00800000
|
||||
|
||||
#define TOSA_GPIO_USB_IN (5)
|
||||
#define TOSA_GPIO_nSD_DETECT (9)
|
||||
#define TOSA_GPIO_ON_RESET (19)
|
||||
#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
|
||||
#define TOSA_GPIO_CF_CD (13)
|
||||
#define TOSA_GPIO_TC6393XB_INT (15)
|
||||
#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
|
||||
#define TOSA_GPIO_USB_IN (5)
|
||||
#define TOSA_GPIO_nSD_DETECT (9)
|
||||
#define TOSA_GPIO_ON_RESET (19)
|
||||
#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
|
||||
#define TOSA_GPIO_CF_CD (13)
|
||||
#define TOSA_GPIO_TC6393XB_INT (15)
|
||||
#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
|
||||
|
||||
#define TOSA_SCOOP_GPIO_BASE 1
|
||||
#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
|
||||
#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
|
||||
#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
|
||||
#define TOSA_SCOOP_GPIO_BASE 1
|
||||
#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
|
||||
#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
|
||||
#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
|
||||
|
||||
#define TOSA_SCOOP_JC_GPIO_BASE 1
|
||||
#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
|
||||
#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
|
||||
#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
|
||||
#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
|
||||
#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
|
||||
#define TOSA_SCOOP_JC_GPIO_BASE 1
|
||||
#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
|
||||
#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
|
||||
#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
|
||||
#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
|
||||
#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
|
||||
|
||||
#define DAC_BASE 0x4e
|
||||
#define DAC_CH1 0
|
||||
#define DAC_CH2 1
|
||||
#define DAC_BASE 0x4e
|
||||
#define DAC_CH1 0
|
||||
#define DAC_CH2 1
|
||||
|
||||
static void tosa_microdrive_attach(PXA2xxState *cpu)
|
||||
{
|
||||
|
@ -65,24 +65,39 @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
|
|||
pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
|
||||
}
|
||||
|
||||
static void tosa_out_switch(void *opaque, int line, int level)
|
||||
/*
|
||||
* Encapsulation of some GPIO line behaviour for the Tosa board
|
||||
*
|
||||
* QEMU interface:
|
||||
* + named GPIO inputs "leds[0..3]": assert to light LEDs
|
||||
* + named GPIO input "reset": when asserted, resets the system
|
||||
*/
|
||||
|
||||
#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
|
||||
#define TOSA_MISC_GPIO(obj) \
|
||||
OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO)
|
||||
|
||||
typedef struct TosaMiscGPIOState {
|
||||
SysBusDevice parent_obj;
|
||||
} TosaMiscGPIOState;
|
||||
|
||||
static void tosa_gpio_leds(void *opaque, int line, int level)
|
||||
{
|
||||
switch (line) {
|
||||
case 0:
|
||||
fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
case 1:
|
||||
fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
case 2:
|
||||
fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
case 3:
|
||||
fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
default:
|
||||
fprintf(stderr, "Uhandled out event: %d = %d\n", line, level);
|
||||
break;
|
||||
case 0:
|
||||
fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
case 1:
|
||||
fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
case 2:
|
||||
fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
case 3:
|
||||
fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -93,13 +108,22 @@ static void tosa_reset(void *opaque, int line, int level)
|
|||
}
|
||||
}
|
||||
|
||||
static void tosa_misc_gpio_init(Object *obj)
|
||||
{
|
||||
DeviceState *dev = DEVICE(obj);
|
||||
|
||||
qdev_init_gpio_in_named(dev, tosa_gpio_leds, "leds", 4);
|
||||
qdev_init_gpio_in_named(dev, tosa_reset, "reset", 1);
|
||||
}
|
||||
|
||||
static void tosa_gpio_setup(PXA2xxState *cpu,
|
||||
DeviceState *scp0,
|
||||
DeviceState *scp1,
|
||||
TC6393xbState *tmio)
|
||||
{
|
||||
qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
|
||||
qemu_irq reset;
|
||||
DeviceState *misc_gpio;
|
||||
|
||||
misc_gpio = sysbus_create_simple(TYPE_TOSA_MISC_GPIO, -1, NULL);
|
||||
|
||||
/* MMC/SD host */
|
||||
pxa2xx_mmci_handlers(cpu->mmc,
|
||||
|
@ -107,8 +131,8 @@ static void tosa_gpio_setup(PXA2xxState *cpu,
|
|||
qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT)));
|
||||
|
||||
/* Handle reset */
|
||||
reset = qemu_allocate_irq(tosa_reset, cpu, 0);
|
||||
qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, reset);
|
||||
qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET,
|
||||
qdev_get_gpio_in_named(misc_gpio, "reset", 0));
|
||||
|
||||
/* PCMCIA signals: card's IRQ and Card-Detect */
|
||||
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
|
||||
|
@ -119,10 +143,14 @@ static void tosa_gpio_setup(PXA2xxState *cpu,
|
|||
qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ),
|
||||
NULL);
|
||||
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]);
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED,
|
||||
qdev_get_gpio_in_named(misc_gpio, "leds", 0));
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED,
|
||||
qdev_get_gpio_in_named(misc_gpio, "leds", 1));
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED,
|
||||
qdev_get_gpio_in_named(misc_gpio, "leds", 2));
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED,
|
||||
qdev_get_gpio_in_named(misc_gpio, "leds", 3));
|
||||
|
||||
qdev_connect_gpio_out(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio));
|
||||
|
||||
|
@ -287,10 +315,22 @@ static const TypeInfo tosa_ssp_info = {
|
|||
.class_init = tosa_ssp_class_init,
|
||||
};
|
||||
|
||||
static const TypeInfo tosa_misc_gpio_info = {
|
||||
.name = "tosa-misc-gpio",
|
||||
.parent = TYPE_SYS_BUS_DEVICE,
|
||||
.instance_size = sizeof(TosaMiscGPIOState),
|
||||
.instance_init = tosa_misc_gpio_init,
|
||||
/*
|
||||
* No class init required: device has no internal state so does not
|
||||
* need to set up reset or vmstate, and has no realize method.
|
||||
*/
|
||||
};
|
||||
|
||||
static void tosa_register_types(void)
|
||||
{
|
||||
type_register_static(&tosa_dac_info);
|
||||
type_register_static(&tosa_ssp_info);
|
||||
type_register_static(&tosa_misc_gpio_info);
|
||||
}
|
||||
|
||||
type_init(tosa_register_types)
|
||||
|
|
|
@ -54,7 +54,8 @@ static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
|
|||
|
||||
void nios2_check_interrupts(CPUNios2State *env)
|
||||
{
|
||||
if (env->irq_pending) {
|
||||
if (env->irq_pending &&
|
||||
(env->regs[CR_STATUS] & CR_STATUS_PIE)) {
|
||||
env->irq_pending = 0;
|
||||
cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
|
||||
}
|
||||
|
|
|
@ -534,6 +534,7 @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq)
|
|||
ptail = (struct virtio_iommu_req_tail *)
|
||||
(buf + s->config.probe_size);
|
||||
ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
tail.status = VIRTIO_IOMMU_S_UNSUPP;
|
||||
|
|
|
@ -23,7 +23,6 @@
|
|||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include <sys/signal.h>
|
||||
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/boards.h"
|
||||
|
|
|
@ -33,7 +33,6 @@ typedef struct BCM283XState {
|
|||
DeviceState parent_obj;
|
||||
/*< public >*/
|
||||
|
||||
char *cpu_type;
|
||||
uint32_t enabled_cpus;
|
||||
|
||||
struct {
|
||||
|
|
|
@ -65,6 +65,7 @@ typedef struct FslIMX25State {
|
|||
MemoryRegion rom[2];
|
||||
MemoryRegion iram;
|
||||
MemoryRegion iram_alias;
|
||||
uint32_t phy_num;
|
||||
} FslIMX25State;
|
||||
|
||||
/**
|
||||
|
|
|
@ -73,6 +73,7 @@ typedef struct FslIMX6State {
|
|||
MemoryRegion caam;
|
||||
MemoryRegion ocram;
|
||||
MemoryRegion ocram_alias;
|
||||
uint32_t phy_num;
|
||||
} FslIMX6State;
|
||||
|
||||
|
||||
|
|
|
@ -81,6 +81,7 @@ typedef struct FslIMX7State {
|
|||
IMX7GPRState gpr;
|
||||
ChipideaState usb[FSL_IMX7_NUM_USBS];
|
||||
DesignwarePCIEHost pcie;
|
||||
uint32_t phy_num[FSL_IMX7_NUM_ETHS];
|
||||
} FslIMX7State;
|
||||
|
||||
enum FslIMX7MemoryMap {
|
||||
|
|
|
@ -8,6 +8,8 @@
|
|||
# include <machine/bswap.h>
|
||||
#elif defined(__FreeBSD__)
|
||||
# include <sys/endian.h>
|
||||
#elif defined(__HAIKU__)
|
||||
# include <endian.h>
|
||||
#elif defined(CONFIG_BYTESWAP_H)
|
||||
# include <byteswap.h>
|
||||
|
||||
|
|
|
@ -104,7 +104,7 @@ extern int daemon(int, int);
|
|||
#include <setjmp.h>
|
||||
#include <signal.h>
|
||||
|
||||
#ifdef __OpenBSD__
|
||||
#ifdef HAVE_SYS_SIGNAL_H
|
||||
#include <sys/signal.h>
|
||||
#endif
|
||||
|
||||
|
@ -432,6 +432,10 @@ void qemu_anon_ram_free(void *ptr, size_t size);
|
|||
#define HAVE_CHARDEV_PARPORT 1
|
||||
#endif
|
||||
|
||||
#if defined(__HAIKU__)
|
||||
#define SIGIO SIGPOLL
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LINUX)
|
||||
#ifndef BUS_MCEERR_AR
|
||||
#define BUS_MCEERR_AR 4
|
||||
|
|
|
@ -337,6 +337,7 @@ bool is_daemonized(void)
|
|||
|
||||
int os_mlock(void)
|
||||
{
|
||||
#ifdef HAVE_MLOCKALL
|
||||
int ret = 0;
|
||||
|
||||
ret = mlockall(MCL_CURRENT | MCL_FUTURE);
|
||||
|
@ -345,4 +346,7 @@ int os_mlock(void)
|
|||
}
|
||||
|
||||
return ret;
|
||||
#else
|
||||
return -ENOSYS;
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -2269,13 +2269,13 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
|
|||
.resetvalue = 0x0 },
|
||||
{ .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,
|
||||
.access = PL1_RW, .accessfn = access_tpm,
|
||||
.type = ARM_CP_ALIAS | ARM_CP_IO,
|
||||
.type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
|
||||
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
|
||||
.writefn = pmintenclr_write, },
|
||||
{ .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
|
||||
.opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
|
||||
.access = PL1_RW, .accessfn = access_tpm,
|
||||
.type = ARM_CP_ALIAS | ARM_CP_IO,
|
||||
.type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
|
||||
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
|
||||
.writefn = pmintenclr_write },
|
||||
{ .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
|
||||
|
|
|
@ -5275,7 +5275,7 @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
|
|||
desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
|
||||
desc <<= SVE_MTEDESC_SHIFT;
|
||||
}
|
||||
desc = simd_desc(vsz, vsz, scale);
|
||||
desc = simd_desc(vsz, vsz, desc | scale);
|
||||
t_desc = tcg_const_i32(desc);
|
||||
|
||||
tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg));
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include "exec/cpu_ldst.h"
|
||||
#include "exec/translator.h"
|
||||
#include "qemu/qemu-print.h"
|
||||
#include "exec/gen-icount.h"
|
||||
|
||||
/* is_jmp field values */
|
||||
#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
|
||||
|
@ -149,7 +150,7 @@ static void t_gen_helper_raise_exception(DisasContext *dc,
|
|||
tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc);
|
||||
gen_helper_raise_exception(dc->cpu_env, tmp);
|
||||
tcg_temp_free_i32(tmp);
|
||||
dc->is_jmp = DISAS_UPDATE;
|
||||
dc->is_jmp = DISAS_NORETURN;
|
||||
}
|
||||
|
||||
static bool use_goto_tb(DisasContext *dc, uint32_t dest)
|
||||
|
@ -518,7 +519,11 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags)
|
|||
/* If interrupts were enabled using WRCTL, trigger them. */
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
if ((instr.imm5 + CR_BASE) == CR_STATUS) {
|
||||
if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
|
||||
gen_io_start();
|
||||
}
|
||||
gen_helper_check_interrupts(dc->cpu_env);
|
||||
dc->is_jmp = DISAS_UPDATE;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
@ -802,7 +807,7 @@ static void gen_exception(DisasContext *dc, uint32_t excp)
|
|||
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
|
||||
gen_helper_raise_exception(cpu_env, tmp);
|
||||
tcg_temp_free_i32(tmp);
|
||||
dc->is_jmp = DISAS_UPDATE;
|
||||
dc->is_jmp = DISAS_NORETURN;
|
||||
}
|
||||
|
||||
/* generate intermediate code for basic block 'tb'. */
|
||||
|
@ -865,6 +870,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
|
|||
/* Indicate where the next block should start */
|
||||
switch (dc->is_jmp) {
|
||||
case DISAS_NEXT:
|
||||
case DISAS_UPDATE:
|
||||
/* Save the current PC back into the CPU register */
|
||||
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
|
||||
tcg_gen_exit_tb(NULL, 0);
|
||||
|
@ -872,11 +878,11 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
|
|||
|
||||
default:
|
||||
case DISAS_JUMP:
|
||||
case DISAS_UPDATE:
|
||||
/* The jump will already have updated the PC register */
|
||||
tcg_gen_exit_tb(NULL, 0);
|
||||
break;
|
||||
|
||||
case DISAS_NORETURN:
|
||||
case DISAS_TB_JUMP:
|
||||
/* nothing more to generate */
|
||||
break;
|
||||
|
|
|
@ -16,7 +16,9 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qemu/thread.h"
|
||||
|
||||
#if defined(CONFIG_SIGNALFD)
|
||||
#include <sys/syscall.h>
|
||||
#endif
|
||||
|
||||
struct sigfd_compat_info
|
||||
{
|
||||
|
|
19
util/drm.c
19
util/drm.c
|
@ -24,7 +24,8 @@ int qemu_drm_rendernode_open(const char *rendernode)
|
|||
{
|
||||
DIR *dir;
|
||||
struct dirent *e;
|
||||
int r, fd;
|
||||
struct stat st;
|
||||
int r, fd, ret;
|
||||
char *p;
|
||||
|
||||
if (rendernode) {
|
||||
|
@ -38,10 +39,6 @@ int qemu_drm_rendernode_open(const char *rendernode)
|
|||
|
||||
fd = -1;
|
||||
while ((e = readdir(dir))) {
|
||||
if (e->d_type != DT_CHR) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (strncmp(e->d_name, "renderD", 7)) {
|
||||
continue;
|
||||
}
|
||||
|
@ -53,6 +50,18 @@ int qemu_drm_rendernode_open(const char *rendernode)
|
|||
g_free(p);
|
||||
continue;
|
||||
}
|
||||
|
||||
/*
|
||||
* prefer fstat() over checking e->d_type == DT_CHR for
|
||||
* portability reasons
|
||||
*/
|
||||
ret = fstat(r, &st);
|
||||
if (ret < 0 || (st.st_mode & S_IFMT) != S_IFCHR) {
|
||||
close(r);
|
||||
g_free(p);
|
||||
continue;
|
||||
}
|
||||
|
||||
fd = r;
|
||||
g_free(p);
|
||||
break;
|
||||
|
|
|
@ -38,7 +38,6 @@
|
|||
#include "qemu/sockets.h"
|
||||
#include "qemu/thread.h"
|
||||
#include <libgen.h>
|
||||
#include <sys/signal.h>
|
||||
#include "qemu/cutils.h"
|
||||
|
||||
#ifdef CONFIG_LINUX
|
||||
|
@ -61,6 +60,10 @@
|
|||
#include <mach-o/dyld.h>
|
||||
#endif
|
||||
|
||||
#ifdef __HAIKU__
|
||||
#include <kernel/image.h>
|
||||
#endif
|
||||
|
||||
#include "qemu/mmap-alloc.h"
|
||||
|
||||
#ifdef CONFIG_DEBUG_STACK_USAGE
|
||||
|
@ -390,6 +393,21 @@ void qemu_init_exec_dir(const char *argv0)
|
|||
}
|
||||
}
|
||||
}
|
||||
#elif defined(__HAIKU__)
|
||||
{
|
||||
image_info ii;
|
||||
int32_t c = 0;
|
||||
|
||||
*buf = '\0';
|
||||
while (get_next_image_info(0, &c, &ii) == B_OK) {
|
||||
if (ii.type == B_APP_IMAGE) {
|
||||
strncpy(buf, ii.name, sizeof(buf));
|
||||
buf[sizeof(buf) - 1] = 0;
|
||||
p = buf;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/* If we don't have any way of figuring out the actual executable
|
||||
location then try argv[0]. */
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "qemu-common.h"
|
||||
|
||||
#if defined(__GLIBC__)
|
||||
#if defined HAVE_PTY_H
|
||||
# include <pty.h>
|
||||
#elif defined CONFIG_BSD
|
||||
# include <termios.h>
|
||||
|
|
Loading…
Reference in a new issue