target-i386/translate.c: mov to/from crN/drN: ignore mod bits
> This instruction is always treated as a register-to-register (MOD = 11) > instruction, regardless of the encoding of the MOD field in the MODR/M > byte. Also, Microport UNIX System V/386 v 2.1 (ca 1987) runs fine on real Intel 386 and 486 CPU's (at least), but does not run in qemu without this patch. Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net> Signed-off-by: malc <av1474@comtv.ru>
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@ -7551,8 +7551,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
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gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
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gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
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} else {
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} else {
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modrm = cpu_ldub_code(cpu_single_env, s->pc++);
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modrm = cpu_ldub_code(cpu_single_env, s->pc++);
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if ((modrm & 0xc0) != 0xc0)
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/* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
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goto illegal_op;
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* AMD documentation (24594.pdf) and testing of
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* intel 386 and 486 processors all show that the mod bits
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* are assumed to be 1's, regardless of actual values.
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*/
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rm = (modrm & 7) | REX_B(s);
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rm = (modrm & 7) | REX_B(s);
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reg = ((modrm >> 3) & 7) | rex_r;
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reg = ((modrm >> 3) & 7) | rex_r;
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if (CODE64(s))
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if (CODE64(s))
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@ -7594,8 +7597,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
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gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
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gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
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} else {
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} else {
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modrm = cpu_ldub_code(cpu_single_env, s->pc++);
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modrm = cpu_ldub_code(cpu_single_env, s->pc++);
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if ((modrm & 0xc0) != 0xc0)
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/* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
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goto illegal_op;
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* AMD documentation (24594.pdf) and testing of
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* intel 386 and 486 processors all show that the mod bits
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* are assumed to be 1's, regardless of actual values.
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*/
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rm = (modrm & 7) | REX_B(s);
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rm = (modrm & 7) | REX_B(s);
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reg = ((modrm >> 3) & 7) | rex_r;
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reg = ((modrm >> 3) & 7) | rex_r;
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if (CODE64(s))
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if (CODE64(s))
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