save more CPU state

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4669 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2008-06-04 18:29:25 +00:00
parent 33c263df7f
commit 5cc1d1e628
3 changed files with 38 additions and 6 deletions

View file

@ -766,7 +766,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
/* XXX: enable it in all cases */
env->cpuid_features |= CPUID_APIC;
}
register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
register_savevm("cpu", i, 5, cpu_save, cpu_load, env);
qemu_register_reset(main_cpu_reset, env);
if (pci_enabled) {
apic_init(env);

View file

@ -541,8 +541,8 @@ typedef struct CPUX86State {
uint64_t efer;
uint64_t star;
target_phys_addr_t vm_hsave;
target_phys_addr_t vm_vmcb;
uint64_t vm_hsave;
uint64_t vm_vmcb;
uint64_t tsc_offset;
uint64_t intercept;
uint16_t intercept_cr_read;

View file

@ -120,6 +120,21 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_be64s(f, &env->kernelgsbase);
#endif
qemu_put_be32s(f, &env->smbase);
qemu_put_be64s(f, &env->pat);
qemu_put_be32s(f, &env->hflags2);
qemu_put_be32s(f, (uint32_t *)&env->halted);
qemu_put_be64s(f, &env->vm_hsave);
qemu_put_be64s(f, &env->vm_vmcb);
qemu_put_be64s(f, &env->tsc_offset);
qemu_put_be64s(f, &env->intercept);
qemu_put_be16s(f, &env->intercept_cr_read);
qemu_put_be16s(f, &env->intercept_cr_write);
qemu_put_be16s(f, &env->intercept_dr_read);
qemu_put_be16s(f, &env->intercept_dr_write);
qemu_put_be32s(f, &env->intercept_exceptions);
qemu_put_8s(f, &env->v_tpr);
}
#ifdef USE_X86LDOUBLE
@ -154,7 +169,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
uint16_t fpus, fpuc, fptag, fpregs_format;
int32_t a20_mask;
if (version_id != 3 && version_id != 4)
if (version_id != 3 && version_id != 4 && version_id != 5)
return -EINVAL;
for(i = 0; i < CPU_NB_REGS; i++)
qemu_get_betls(f, &env->regs[i]);
@ -258,10 +273,27 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
qemu_get_be64s(f, &env->fmask);
qemu_get_be64s(f, &env->kernelgsbase);
#endif
if (version_id >= 4)
if (version_id >= 4) {
qemu_get_be32s(f, &env->smbase);
}
if (version_id >= 5) {
qemu_get_be64s(f, &env->pat);
qemu_get_be32s(f, &env->hflags2);
qemu_get_be32s(f, (uint32_t *)&env->halted);
/* XXX: compute hflags from scratch, except for CPL and IIF */
qemu_get_be64s(f, &env->vm_hsave);
qemu_get_be64s(f, &env->vm_vmcb);
qemu_get_be64s(f, &env->tsc_offset);
qemu_get_be64s(f, &env->intercept);
qemu_get_be16s(f, &env->intercept_cr_read);
qemu_get_be16s(f, &env->intercept_cr_write);
qemu_get_be16s(f, &env->intercept_dr_read);
qemu_get_be16s(f, &env->intercept_dr_write);
qemu_get_be32s(f, &env->intercept_exceptions);
qemu_get_8s(f, &env->v_tpr);
}
/* XXX: ensure compatiblity for halted bit ? */
/* XXX: compute redundant hflags bits */
env->hflags = hflags;
tlb_flush(env, 1);
return 0;