haraldwolff/qemu-patch-raspberry4
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Merge branch 'ppc-next' of git://repo.or.cz/qemu/agraf

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* 'ppc-next' of git://repo.or.cz/qemu/agraf:
  Fix a bug in mtsr/mtsrin emulation on ppc64
  pSeries: Clean up write-only variables
  w32: Fix compilation and replace non-portable usage of ulong
This commit is contained in:
Aurelien Jarno 2011-05-23 22:35:37 +02:00
parent 05c8a1e423 decb471488
commit 5db070eb1a
4 changed files with 7 additions and 16 deletions
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7
hw/spapr_hcall.c
View file

@ -100,22 +100,18 @@ static target_ulong h_enter(CPUState *env, sPAPREnvironment *spapr,
target_ulong pte_index = args[1];
target_ulong pteh = args[2];
target_ulong ptel = args[3];
target_ulong porder;
target_ulong i, pa;
target_ulong i;
uint8_t *hpte;
/* only handle 4k and 16M pages for now */
porder = 12;
if (pteh & HPTE_V_LARGE) {
#if 0 /* We don't support 64k pages yet */
if ((ptel & 0xf000) == 0x1000) {
/* 64k page */
porder = 16;
} else
#endif
if ((ptel & 0xff000) == 0) {
/* 16M page */
porder = 24;
/* lowest AVA bit must be 0 for 16M pages */
if (pteh & 0x80) {
return H_PARAMETER;
@ -125,7 +121,6 @@ static target_ulong h_enter(CPUState *env, sPAPREnvironment *spapr,
}
}
pa = ptel & HPTE_R_RPN;
/* FIXME: bounds check the pa? */
/* Check WIMG */

3
hw/spapr_llan.c
View file

@ -185,9 +185,6 @@ static NetClientInfo net_spapr_vlan_info = {
static int spapr_vlan_init(VIOsPAPRDevice *sdev)
{
VIOsPAPRVLANDevice *dev = (VIOsPAPRVLANDevice *)sdev;
VIOsPAPRBus *bus;
bus = DO_UPCAST(VIOsPAPRBus, bus, sdev->qdev.parent_bus);
qemu_macaddr_default_if_unset(&dev->nicconf.macaddr);

4
target-ppc/cpu.h
View file

@ -1929,8 +1929,8 @@ static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
#if !defined(CONFIG_USER_ONLY)
static inline int booke206_tlbe_id(CPUState *env, ppcemb_tlb_t *tlbe)
{
ulong tlbel = (ulong)tlbe;
ulong tlbl = (ulong)env->tlb;
uintptr_t tlbel = (uintptr_t)tlbe;
uintptr_t tlbl = (uintptr_t)env->tlb;
return (tlbel - tlbl) / sizeof(env->tlb[0]);
}

9
target-ppc/helper.c
View file

@ -606,7 +606,7 @@ static inline int _find_pte(CPUState *env, mmu_ctx_t *ctx, int is_64b, int h,
r = pte64_check(ctx, pte0, pte1, h, rw, type);
LOG_MMU("Load pte from " TARGET_FMT_lx " => " TARGET_FMT_lx " "
TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n",
pteg_base + (i * 16), pte0, pte1, (int)(pte0 & 1), h,
pteg_off + (i * 16), pte0, pte1, (int)(pte0 & 1), h,
(int)((pte0 >> 1) & 1), ctx->ptem);
} else
#endif
@ -621,7 +621,7 @@ static inline int _find_pte(CPUState *env, mmu_ctx_t *ctx, int is_64b, int h,
r = pte32_check(ctx, pte0, pte1, h, rw, type);
LOG_MMU("Load pte from " TARGET_FMT_lx " => " TARGET_FMT_lx " "
TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n",
pteg_base + (i * 8), pte0, pte1, (int)(pte0 >> 31), h,
pteg_off + (i * 8), pte0, pte1, (int)(pte0 >> 31), h,
(int)((pte0 >> 6) & 1), ctx->ptem);
}
switch (r) {
@ -918,8 +918,7 @@ static inline int get_segment(CPUState *env, mmu_ctx_t *ctx,
if (eaddr != 0xEFFFFFFF)
LOG_MMU("1 htab=" TARGET_FMT_plx "/" TARGET_FMT_plx
" vsid=" TARGET_FMT_lx " api=" TARGET_FMT_lx
" hash=" TARGET_FMT_plx " pg_addr="
TARGET_FMT_plx "\n", env->htab_base,
" hash=" TARGET_FMT_plx "\n", env->htab_base,
env->htab_mask, vsid, ctx->ptem, ctx->hash[1]);
ret2 = find_pte(env, ctx, 1, rw, type,
target_page_bits);
@ -2140,7 +2139,7 @@ void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value)
/* VSID = VSID */
rs |= (value & 0xfffffff) << 12;
/* flags = flags */
rs |= ((value >> 27) & 0xf) << 9;
rs |= ((value >> 27) & 0xf) << 8;
ppc_store_slb(env, rb, rs);
} else