tcg-ppc64: Tidy register allocation order
Remove conditionalization from tcg_target_reg_alloc_order, relying on reserved_regs to prevent register allocation that shouldn't happen. So R11 is now present in reg_alloc_order for __APPLE__, but also now reserved. Sort reg_alloc_order into call-saved, call-clobbered, and parameters. This reduces the effect of values getting spilled and reloaded before function calls. Whether or not it is reserved, R2 (TOC) is always call-clobbered. Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -99,7 +99,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
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#endif
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#endif
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static const int tcg_target_reg_alloc_order[] = {
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static const int tcg_target_reg_alloc_order[] = {
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TCG_REG_R14,
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TCG_REG_R14, /* call saved registers */
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TCG_REG_R15,
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TCG_REG_R15,
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TCG_REG_R16,
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TCG_REG_R16,
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TCG_REG_R17,
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TCG_REG_R17,
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@ -109,29 +109,25 @@ static const int tcg_target_reg_alloc_order[] = {
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TCG_REG_R21,
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TCG_REG_R21,
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TCG_REG_R22,
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TCG_REG_R22,
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TCG_REG_R23,
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TCG_REG_R23,
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TCG_REG_R24,
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TCG_REG_R25,
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TCG_REG_R26,
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TCG_REG_R27,
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TCG_REG_R28,
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TCG_REG_R28,
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TCG_REG_R29,
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TCG_REG_R29,
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TCG_REG_R30,
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TCG_REG_R30,
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TCG_REG_R31,
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TCG_REG_R31,
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#ifdef __APPLE__
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TCG_REG_R12, /* call clobbered, non-arguments */
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TCG_REG_R2,
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#endif
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TCG_REG_R3,
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TCG_REG_R4,
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TCG_REG_R5,
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TCG_REG_R6,
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TCG_REG_R7,
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TCG_REG_R8,
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TCG_REG_R9,
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TCG_REG_R10,
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#ifndef __APPLE__
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TCG_REG_R11,
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TCG_REG_R11,
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#endif
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TCG_REG_R2,
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TCG_REG_R12,
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TCG_REG_R10, /* call clobbered, arguments */
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TCG_REG_R24,
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TCG_REG_R9,
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TCG_REG_R25,
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TCG_REG_R8,
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TCG_REG_R26,
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TCG_REG_R7,
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TCG_REG_R27
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TCG_REG_R6,
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TCG_REG_R5,
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TCG_REG_R4,
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TCG_REG_R3,
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};
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};
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static const int tcg_target_call_iarg_regs[] = {
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static const int tcg_target_call_iarg_regs[] = {
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@ -2133,9 +2129,7 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
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tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
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tcg_regset_set32(tcg_target_call_clobber_regs, 0,
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tcg_regset_set32(tcg_target_call_clobber_regs, 0,
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(1 << TCG_REG_R0) |
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(1 << TCG_REG_R0) |
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#ifdef __APPLE__
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(1 << TCG_REG_R2) |
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(1 << TCG_REG_R2) |
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#endif
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(1 << TCG_REG_R3) |
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(1 << TCG_REG_R3) |
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(1 << TCG_REG_R4) |
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(1 << TCG_REG_R4) |
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(1 << TCG_REG_R5) |
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(1 << TCG_REG_R5) |
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@ -2145,16 +2139,17 @@ static void tcg_target_init(TCGContext *s)
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(1 << TCG_REG_R9) |
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(1 << TCG_REG_R9) |
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(1 << TCG_REG_R10) |
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(1 << TCG_REG_R10) |
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(1 << TCG_REG_R11) |
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(1 << TCG_REG_R11) |
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(1 << TCG_REG_R12)
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(1 << TCG_REG_R12));
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);
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tcg_regset_clear(s->reserved_regs);
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tcg_regset_clear(s->reserved_regs);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); /* tcg temp */
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); /* stack pointer */
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#ifndef __APPLE__
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#ifdef __APPLE__
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R11); /* ??? */
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#else
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); /* toc */
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#endif
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#endif
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* thread pointer */
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tcg_add_target_add_op_defs(ppc_op_defs);
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tcg_add_target_add_op_defs(ppc_op_defs);
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}
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}
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