x86: avoid AREG0 for SMM helpers

Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2012-04-29 17:54:21 +00:00
parent 052e80d5e0
commit 608badfc66
4 changed files with 6 additions and 13 deletions

View file

@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o
obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_LINUX_USER) += ioport-user.o
obj-$(CONFIG_BSD_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o
$(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/seg_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/seg_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

View file

@ -71,7 +71,7 @@ DEF_HELPER_1(set_inhibit_irq, void, env)
DEF_HELPER_1(reset_inhibit_irq, void, env) DEF_HELPER_1(reset_inhibit_irq, void, env)
DEF_HELPER_2(boundw, void, tl, int) DEF_HELPER_2(boundw, void, tl, int)
DEF_HELPER_2(boundl, void, tl, int) DEF_HELPER_2(boundl, void, tl, int)
DEF_HELPER_0(rsm, void) DEF_HELPER_1(rsm, void, env)
DEF_HELPER_1(into, void, int) DEF_HELPER_1(into, void, int)
DEF_HELPER_1(cmpxchg8b, void, tl) DEF_HELPER_1(cmpxchg8b, void, tl)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64

View file

@ -18,18 +18,17 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
/* SMM support */ /* SMM support */
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
void do_smm_enter(CPUX86State *env1) void do_smm_enter(CPUX86State *env)
{ {
} }
void helper_rsm(void) void helper_rsm(CPUX86State *env)
{ {
} }
@ -41,15 +40,11 @@ void helper_rsm(void)
#define SMM_REVISION_ID 0x00020000 #define SMM_REVISION_ID 0x00020000
#endif #endif
void do_smm_enter(CPUX86State *env1) void do_smm_enter(CPUX86State *env)
{ {
target_ulong sm_state; target_ulong sm_state;
SegmentCache *dt; SegmentCache *dt;
int i, offset; int i, offset;
CPUX86State *saved_env;
saved_env = env;
env = env1;
qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); qemu_log_mask(CPU_LOG_INT, "SMM: enter\n");
log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
@ -180,10 +175,9 @@ void do_smm_enter(CPUX86State *env1)
cpu_x86_update_cr4(env, 0); cpu_x86_update_cr4(env, 0);
env->dr[7] = 0x00000400; env->dr[7] = 0x00000400;
CC_OP = CC_OP_EFLAGS; CC_OP = CC_OP_EFLAGS;
env = saved_env;
} }
void helper_rsm(void) void helper_rsm(CPUX86State *env)
{ {
target_ulong sm_state; target_ulong sm_state;
int i, offset; int i, offset;

View file

@ -7721,7 +7721,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
goto illegal_op; goto illegal_op;
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s->pc - s->cs_base); gen_jmp_im(s->pc - s->cs_base);
gen_helper_rsm(); gen_helper_rsm(cpu_env);
gen_eob(s); gen_eob(s);
break; break;
case 0x1b8: /* SSE4.2 popcnt */ case 0x1b8: /* SSE4.2 popcnt */