haraldwolff/qemu-patch-raspberry4
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target-ppc: stop translation after a trap instruction

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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2010-02-28 14:11:06 +01:00
parent 5bb599023a
commit 6454e7be1b
1 changed files with 12 additions and 8 deletions
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20
target-ppc/translate.c
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@ -3618,8 +3618,9 @@ static void gen_sc(DisasContext *ctx)
static void gen_tw(DisasContext *ctx) static void gen_tw(DisasContext *ctx)
{ {
TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
/* Update the nip since this might generate a trap exception */ /* Stop the translation since this might generate a trap exception
gen_update_nip(ctx, ctx->nip); and/or following instructions might be invalid */
gen_stop_exception(ctx);
gen_helper_tw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); gen_helper_tw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0);
tcg_temp_free_i32(t0); tcg_temp_free_i32(t0);
} }
@ -3629,8 +3630,9 @@ static void gen_twi(DisasContext *ctx)
{ {
TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
/* Update the nip since this might generate a trap exception */ /* Stop the translation since this might generate a trap exception
gen_update_nip(ctx, ctx->nip); and/or following instructions might be invalid */
gen_stop_exception(ctx);
gen_helper_tw(cpu_gpr[rA(ctx->opcode)], t0, t1); gen_helper_tw(cpu_gpr[rA(ctx->opcode)], t0, t1);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free_i32(t1); tcg_temp_free_i32(t1);
@ -3641,8 +3643,9 @@ static void gen_twi(DisasContext *ctx)
static void gen_td(DisasContext *ctx) static void gen_td(DisasContext *ctx)
{ {
TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
/* Update the nip since this might generate a trap exception */ /* Stop the translation since this might generate a trap exception
gen_update_nip(ctx, ctx->nip); and/or following instructions might be invalid */
gen_stop_exception(ctx);
gen_helper_td(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); gen_helper_td(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0);
tcg_temp_free_i32(t0); tcg_temp_free_i32(t0);
} }
@ -3652,8 +3655,9 @@ static void gen_tdi(DisasContext *ctx)
{ {
TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
/* Update the nip since this might generate a trap exception */ /* Stop the translation since this might generate a trap exception
gen_update_nip(ctx, ctx->nip); and/or following instructions might be invalid */
gen_stop_exception(ctx);
gen_helper_td(cpu_gpr[rA(ctx->opcode)], t0, t1); gen_helper_td(cpu_gpr[rA(ctx->opcode)], t0, t1);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free_i32(t1); tcg_temp_free_i32(t1);