tc6393xb: non-accelerated FB support (Dmitry Baryshkov).
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5617 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
4ea29f749d
commit
64b40bc54a
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@ -66,9 +66,11 @@ void tusb6010_power(struct tusb_s *s, int on);
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/* tc6393xb.c */
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/* tc6393xb.c */
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struct tc6393xb_s;
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struct tc6393xb_s;
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struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq);
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#define TC6393XB_RAM 0x110000 /* amount of ram for Video and USB */
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struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds);
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void tc6393xb_gpio_out_set(struct tc6393xb_s *s, int line,
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void tc6393xb_gpio_out_set(struct tc6393xb_s *s, int line,
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qemu_irq handler);
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qemu_irq handler);
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qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s);
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qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s);
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qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s);
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#endif
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#endif
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122
hw/tc6393xb.c
122
hw/tc6393xb.c
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@ -11,6 +11,8 @@
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#include "pxa.h"
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#include "pxa.h"
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#include "devices.h"
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#include "devices.h"
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#include "flash.h"
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#include "flash.h"
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#include "console.h"
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#include "pixel_ops.h"
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#define IRQ_TC6393_NAND 0
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#define IRQ_TC6393_NAND 0
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#define IRQ_TC6393_MMC 1
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#define IRQ_TC6393_MMC 1
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@ -119,6 +121,14 @@ struct tc6393xb_s {
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uint32_t nand_phys;
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uint32_t nand_phys;
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struct nand_flash_s *flash;
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struct nand_flash_s *flash;
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struct ecc_state_s ecc;
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struct ecc_state_s ecc;
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DisplayState *ds;
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QEMUConsole *console;
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ram_addr_t vram_addr;
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uint32_t scr_width, scr_height; /* in pixels */
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qemu_irq l3v;
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unsigned blank : 1,
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blanked : 1;
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};
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};
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qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s)
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qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s)
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@ -164,6 +174,18 @@ static void tc6393xb_gpio_handler_update(struct tc6393xb_s *s)
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s->prev_level = level;
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s->prev_level = level;
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}
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}
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qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s)
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{
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return s->l3v;
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}
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static void tc6393xb_l3v(void *opaque, int line, int level)
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{
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struct tc6393xb_s *s = opaque;
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s->blank = !level;
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fprintf(stderr, "L3V: %d\n", level);
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}
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static void tc6393xb_sub_irq(void *opaque, int line, int level) {
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static void tc6393xb_sub_irq(void *opaque, int line, int level) {
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struct tc6393xb_s *s = opaque;
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struct tc6393xb_s *s = opaque;
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uint8_t isr = s->scr.ISR;
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uint8_t isr = s->scr.ISR;
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@ -395,6 +417,85 @@ static void tc6393xb_nand_writeb(struct tc6393xb_s *s, target_phys_addr_t addr,
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(uint32_t) addr, value & 0xff);
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(uint32_t) addr, value & 0xff);
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}
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}
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#define BITS 8
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#include "tc6393xb_template.h"
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#define BITS 15
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#include "tc6393xb_template.h"
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#define BITS 16
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#include "tc6393xb_template.h"
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#define BITS 24
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#include "tc6393xb_template.h"
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#define BITS 32
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#include "tc6393xb_template.h"
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static void tc6393xb_draw_graphic(struct tc6393xb_s *s, int full_update)
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{
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switch (s->ds->depth) {
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case 8:
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tc6393xb_draw_graphic8(s);
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break;
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case 15:
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tc6393xb_draw_graphic15(s);
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break;
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case 16:
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tc6393xb_draw_graphic16(s);
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break;
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case 24:
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tc6393xb_draw_graphic24(s);
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break;
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case 32:
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tc6393xb_draw_graphic32(s);
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break;
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default:
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printf("tc6393xb: unknown depth %d\n", s->ds->depth);
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return;
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}
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dpy_update(s->ds, 0, 0, s->scr_width, s->scr_height);
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}
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static void tc6393xb_draw_blank(struct tc6393xb_s *s, int full_update)
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{
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int i, w;
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uint8_t *d;
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if (!full_update)
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return;
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w = s->scr_width * ((s->ds->depth + 7) >> 3);
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d = s->ds->data;
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for(i = 0; i < s->scr_height; i++) {
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memset(d, 0, w);
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d += s->ds->linesize;
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}
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dpy_update(s->ds, 0, 0, s->scr_width, s->scr_height);
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}
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static void tc6393xb_update_display(void *opaque)
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{
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struct tc6393xb_s *s = opaque;
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int full_update;
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if (s->scr_width == 0 || s->scr_height == 0)
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return;
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full_update = 0;
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if (s->blanked != s->blank) {
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s->blanked = s->blank;
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full_update = 1;
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}
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if (s->scr_width != s->ds->width || s->scr_height != s->ds->height) {
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qemu_console_resize(s->console, s->scr_width, s->scr_height);
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full_update = 1;
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}
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if (s->blanked)
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tc6393xb_draw_blank(s, full_update);
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else
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tc6393xb_draw_graphic(s, full_update);
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}
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static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
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static uint32_t tc6393xb_readb(void *opaque, target_phys_addr_t addr) {
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struct tc6393xb_s *s = opaque;
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struct tc6393xb_s *s = opaque;
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addr -= s->target_base;
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addr -= s->target_base;
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@ -465,7 +566,7 @@ static void tc6393xb_writel(void *opaque, target_phys_addr_t addr, uint32_t valu
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tc6393xb_writeb(opaque, addr + 3, value >> 24);
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tc6393xb_writeb(opaque, addr + 3, value >> 24);
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}
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}
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struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq)
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struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds)
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{
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{
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int iomemtype;
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int iomemtype;
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struct tc6393xb_s *s;
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struct tc6393xb_s *s;
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@ -485,13 +586,30 @@ struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq)
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s->irq = irq;
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s->irq = irq;
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s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS);
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s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS);
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s->l3v = *qemu_allocate_irqs(tc6393xb_l3v, s, 1);
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s->blanked = 1;
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s->sub_irqs = qemu_allocate_irqs(tc6393xb_sub_irq, s, TC6393XB_NR_IRQS);
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s->sub_irqs = qemu_allocate_irqs(tc6393xb_sub_irq, s, TC6393XB_NR_IRQS);
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s->flash = nand_init(NAND_MFR_TOSHIBA, 0x76);
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s->flash = nand_init(NAND_MFR_TOSHIBA, 0x76);
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iomemtype = cpu_register_io_memory(0, tc6393xb_readfn,
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iomemtype = cpu_register_io_memory(0, tc6393xb_readfn,
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tc6393xb_writefn, s);
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tc6393xb_writefn, s);
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cpu_register_physical_memory(s->target_base, 0x200000, iomemtype);
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cpu_register_physical_memory(s->target_base, 0x10000, iomemtype);
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if (ds) {
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s->ds = ds;
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s->vram_addr = qemu_ram_alloc(0x100000);
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cpu_register_physical_memory(s->target_base + 0x100000, 0x100000, s->vram_addr);
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s->scr_width = 480;
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s->scr_height = 640;
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s->console = graphic_console_init(ds,
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tc6393xb_update_display,
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NULL, /* invalidate */
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NULL, /* screen_dump */
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NULL, /* text_update */
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s);
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}
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return s;
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return s;
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}
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}
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72
hw/tc6393xb_template.h
Normal file
72
hw/tc6393xb_template.h
Normal file
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@ -0,0 +1,72 @@
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/*
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* Toshiba TC6393XB I/O Controller.
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* Found in Sharp Zaurus SL-6000 (tosa) or some
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* Toshiba e-Series PDAs.
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*
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* FB support code. Based on G364 fb emulator
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*
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* Copyright (c) 2007 Hervé Poussineau
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#if BITS == 8
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# define SET_PIXEL(addr, color) *(uint8_t*)addr = color;
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#elif BITS == 15 || BITS == 16
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# define SET_PIXEL(addr, color) *(uint16_t*)addr = color;
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#elif BITS == 24
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# define SET_PIXEL(addr, color) \
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addr[0] = color; addr[1] = (color) >> 8; addr[2] = (color) >> 16;
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#elif BITS == 32
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# define SET_PIXEL(addr, color) *(uint32_t*)addr = color;
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#else
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# error unknown bit depth
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#endif
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static void glue(tc6393xb_draw_graphic, BITS)(struct tc6393xb_s *s)
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{
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int i;
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int w_display;
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uint16_t *data_buffer;
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uint8_t *data_display;
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data_buffer = (uint16_t*)(phys_ram_base + s->vram_addr);
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w_display = s->scr_width * BITS / 8;
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data_display = s->ds->data;
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for(i = 0; i < s->scr_height; i++) {
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#if (BITS == 16)
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memcpy(data_display, data_buffer, s->scr_width * 2);
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data_buffer += s->scr_width;
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data_display += s->ds->linesize;
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#else
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int j;
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for (j = 0; j < s->scr_width; j++, data_display += BITS / 8, data_buffer++) {
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uint16_t color = *data_buffer;
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uint32_t dest_color = glue(rgb_to_pixel, BITS)(
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((color & 0xf800) * 0x108) >> 11,
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((color & 0x7e0) * 0x41) >> 9,
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((color & 0x1f) * 0x21) >> 2
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);
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SET_PIXEL(data_display, dest_color);
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}
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#endif
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}
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}
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#undef BITS
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#undef SET_PIXEL
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17
hw/tosa.c
17
hw/tosa.c
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@ -38,6 +38,7 @@
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#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
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#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
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#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
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#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
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#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
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#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
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#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
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#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
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#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
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#define DAC_BASE 0x4e
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#define DAC_BASE 0x4e
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@ -84,7 +85,8 @@ static void tosa_out_switch(void *opaque, int line, int level)
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static void tosa_gpio_setup(struct pxa2xx_state_s *cpu,
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static void tosa_gpio_setup(struct pxa2xx_state_s *cpu,
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struct scoop_info_s *scp0,
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struct scoop_info_s *scp0,
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struct scoop_info_s *scp1)
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struct scoop_info_s *scp1,
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struct tc6393xb_s *tmio)
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{
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{
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qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
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qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
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/* MMC/SD host */
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/* MMC/SD host */
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@ -108,6 +110,8 @@ static void tosa_gpio_setup(struct pxa2xx_state_s *cpu,
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scoop_gpio_out_set(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
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scoop_gpio_out_set(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
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scoop_gpio_out_set(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
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scoop_gpio_out_set(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
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scoop_gpio_out_set(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
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scoop_gpio_out_set(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
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scoop_gpio_out_set(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio));
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}
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}
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static uint32_t tosa_ssp_read(void *opaque)
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static uint32_t tosa_ssp_read(void *opaque)
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@ -198,9 +202,10 @@ static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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struct pxa2xx_state_s *cpu;
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struct pxa2xx_state_s *cpu;
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struct tc6393xb_s *tmio;
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struct scoop_info_s *scp0, *scp1;
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struct scoop_info_s *scp0, *scp1;
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if (ram_size < (TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE)) {
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if (ram_size < (TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE + TC6393XB_RAM)) {
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fprintf(stderr, "This platform requires %i bytes of memory\n",
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fprintf(stderr, "This platform requires %i bytes of memory\n",
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TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE);
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TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE);
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exit(1);
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exit(1);
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@ -214,12 +219,14 @@ static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
|
||||||
cpu_register_physical_memory(0, TOSA_ROM,
|
cpu_register_physical_memory(0, TOSA_ROM,
|
||||||
qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM);
|
qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM);
|
||||||
|
|
||||||
tc6393xb_init(0x10000000, pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]);
|
tmio = tc6393xb_init(0x10000000,
|
||||||
|
pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT],
|
||||||
|
ds);
|
||||||
|
|
||||||
scp0 = scoop_init(cpu, 0, 0x08800000);
|
scp0 = scoop_init(cpu, 0, 0x08800000);
|
||||||
scp1 = scoop_init(cpu, 1, 0x14800040);
|
scp1 = scoop_init(cpu, 1, 0x14800040);
|
||||||
|
|
||||||
tosa_gpio_setup(cpu, scp0, scp1);
|
tosa_gpio_setup(cpu, scp0, scp1, tmio);
|
||||||
|
|
||||||
tosa_microdrive_attach(cpu);
|
tosa_microdrive_attach(cpu);
|
||||||
|
|
||||||
|
@ -240,5 +247,5 @@ QEMUMachine tosapda_machine = {
|
||||||
.name = "tosa",
|
.name = "tosa",
|
||||||
.desc = "Tosa PDA (PXA255)",
|
.desc = "Tosa PDA (PXA255)",
|
||||||
.init = tosa_init,
|
.init = tosa_init,
|
||||||
.ram_require = TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
|
.ram_require = TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED + TC6393XB_RAM,
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in a new issue