Revert commits 5082 and 5083

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5084 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/helper.h

@@ -1,21 +0,0 @@
-#ifndef DEF_HELPER
-#define DEF_HELPER(ret, name, params) ret name params;
-#endif
-
-DEF_HELPER(target_ulong, do_load_cr, (void))
-DEF_HELPER(void, do_print_mem_EA, (target_ulong))
-DEF_HELPER(void, do_store_cr, (uint32_t))
-
-#if !defined (CONFIG_USER_ONLY)
-DEF_HELPER(void, do_store_msr, (target_ulong))
-#if defined(TARGET_PPC64)
-DEF_HELPER(void, do_store_msr_32, (target_ulong))
-#endif
-#endif
-
-DEF_HELPER(target_ulong, do_popcntb, (target_ulong))
-#if defined(TARGET_PPC64)
-DEF_HELPER(target_ulong, do_popcntb_64, (target_ulong))
-#endif
-
-

target-ppc/op.c

@@ -122,6 +122,12 @@
 #define REG 31
 #include "op_template.h"
 
+void OPPROTO op_print_mem_EA (void)
+{
+    do_print_mem_EA(T0);
+    RETURN();
+}
+
 /* PowerPC state maintenance operations */
 /* set_Rc0 */
 void OPPROTO op_set_Rc0 (void)
@@ -130,6 +136,13 @@ void OPPROTO op_set_Rc0 (void)
     RETURN();
 }
 
+/* Constants load */
+void OPPROTO op_reset_T0 (void)
+{
+    T0 = 0;
+    RETURN();
+}
+
 void OPPROTO op_set_T0 (void)
 {
     T0 = (uint32_t)PARAM1;
@@ -190,11 +203,50 @@ void OPPROTO op_raise_exception_err (void)
     do_raise_exception_err(PARAM1, PARAM2);
 }
 
+void OPPROTO op_update_nip (void)
+{
+    env->nip = (uint32_t)PARAM1;
+    RETURN();
+}
+
+#if defined(TARGET_PPC64)
+void OPPROTO op_update_nip_64 (void)
+{
+    env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
+    RETURN();
+}
+#endif
+
 void OPPROTO op_debug (void)
 {
     do_raise_exception(EXCP_DEBUG);
 }
 
+/* Load/store special registers */
+void OPPROTO op_load_cr (void)
+{
+    do_load_cr();
+    RETURN();
+}
+
+void OPPROTO op_store_cr (void)
+{
+    do_store_cr(PARAM1);
+    RETURN();
+}
+
+void OPPROTO op_load_cro (void)
+{
+    T0 = env->crf[PARAM1];
+    RETURN();
+}
+
+void OPPROTO op_store_cro (void)
+{
+    env->crf[PARAM1] = T0;
+    RETURN();
+}
+
 void OPPROTO op_load_xer_cr (void)
 {
     T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);
@@ -300,6 +352,27 @@ void OPPROTO op_store_asr (void)
 }
 #endif
 
+void OPPROTO op_load_msr (void)
+{
+    T0 = env->msr;
+    RETURN();
+}
+
+void OPPROTO op_store_msr (void)
+{
+    do_store_msr();
+    RETURN();
+}
+
+#if defined (TARGET_PPC64)
+void OPPROTO op_store_msr_32 (void)
+{
+    T0 = (env->msr & ~0xFFFFFFFFULL) | (T0 & 0xFFFFFFFF);
+    do_store_msr();
+    RETURN();
+}
+#endif
+
 void OPPROTO op_update_riee (void)
 {
     /* We don't call do_store_msr here as we won't trigger
@@ -1304,6 +1377,20 @@ void OPPROTO op_isel (void)
     RETURN();
 }
 
+void OPPROTO op_popcntb (void)
+{
+    do_popcntb();
+    RETURN();
+}
+
+#if defined(TARGET_PPC64)
+void OPPROTO op_popcntb_64 (void)
+{
+    do_popcntb_64();
+    RETURN();
+}
+#endif
+
 /***                            Integer logical                            ***/
 /* and */
 void OPPROTO op_and (void)

target-ppc/op_helper.c

@@ -68,9 +68,9 @@ void do_print_mem_EA (target_ulong EA)
 
 /*****************************************************************************/
 /* Registers load and stores */
-target_ulong do_load_cr (void)
+void do_load_cr (void)
 {
-    return (env->crf[0] << 28) |
+    T0 = (env->crf[0] << 28) |
         (env->crf[1] << 24) |
         (env->crf[2] << 20) |
         (env->crf[3] << 16) |
@@ -429,27 +429,27 @@ void do_srad (void)
 }
 #endif
 
-target_ulong do_popcntb (target_ulong t0)
+void do_popcntb (void)
 {
     uint32_t ret;
     int i;
 
     ret = 0;
     for (i = 0; i < 32; i += 8)
-        ret |= ctpop8((t0 >> i) & 0xFF) << i;
+        ret |= ctpop8((T0 >> i) & 0xFF) << i;
-    return ret;
+    T0 = ret;
 }
 
 #if defined(TARGET_PPC64)
-target_ulong do_popcntb_64 (target_ulong t0)
+void do_popcntb_64 (void)
 {
     uint64_t ret;
     int i;
 
     ret = 0;
     for (i = 0; i < 64; i += 8)
-        ret |= ctpop8((t0 >> i) & 0xFF) << i;
+        ret |= ctpop8((T0 >> i) & 0xFF) << i;
-    return ret;
+    T0 = ret;
 }
 #endif
 
@@ -1404,23 +1404,15 @@ void do_fcmpo (void)
 #if !defined (CONFIG_USER_ONLY)
 void cpu_dump_rfi (target_ulong RA, target_ulong msr);
 
-void do_store_msr (target_ulong t0)
+void do_store_msr (void)
 {
-    t0 = hreg_store_msr(env, t0, 0);
+    T0 = hreg_store_msr(env, T0, 0);
-    if (t0 != 0) {
+    if (T0 != 0) {
         env->interrupt_request |= CPU_INTERRUPT_EXITTB;
-        do_raise_exception(t0);
+        do_raise_exception(T0);
     }
 }
 
-#if defined (TARGET_PPC64)
-void do_store_msr_32 (target_ulong t0)
-{
-    t0 = (env->msr & ~0xFFFFFFFFULL) | (t0 & 0xFFFFFFFF);
-    do_store_msr(t0);
-}
-#endif
-
 static always_inline void __do_rfi (target_ulong nip, target_ulong msr,
                                     target_ulong msrm, int keep_msrh)
 {

target-ppc/op_helper.h

@@ -51,6 +51,7 @@ void glue(do_dcbz_64, MEMSUFFIX) (void);
 void do_print_mem_EA (target_ulong EA);
 
 /* Registers load and stores */
+void do_load_cr (void);
 void do_store_cr (uint32_t mask);
 #if defined(TARGET_PPC64)
 void do_store_pri (int prio);
@@ -87,6 +88,10 @@ void do_subfmeo_64 (void);
 void do_subfzeo_64 (void);
 void do_srad (void);
 #endif
+void do_popcntb (void);
+#if defined(TARGET_PPC64)
+void do_popcntb_64 (void);
+#endif
 
 /* Floating-point arithmetic helpers */
 void do_compute_fprf (int set_class);
@@ -133,6 +138,7 @@ void do_tw (int flags);
 void do_td (int flags);
 #endif
 #if !defined(CONFIG_USER_ONLY)
+void do_store_msr (void);
 void do_rfi (void);
 #if defined(TARGET_PPC64)
 void do_rfid (void);

target-ppc/translate.c

@@ -26,7 +26,6 @@
 #include "cpu.h"
 #include "exec-all.h"
 #include "disas.h"
-#include "helper.h"
 #include "tcg-op.h"
 #include "qemu-common.h"
 
@@ -44,7 +43,7 @@
 /*****************************************************************************/
 /* Code translation helpers                                                  */
 
-static TCGv cpu_env, cpu_T[3];
+static TCGv cpu_env;
 
 #include "gen-icount.h"
 
@@ -54,36 +53,9 @@ void ppc_translate_init(void)
     if (done_init)
         return;
     cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
-#if TARGET_LONG_BITS > HOST_LONG_BITS
-    cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,
-                                  TCG_AREG0, offsetof(CPUState, t0), "T0");
-    cpu_T[1] = tcg_global_mem_new(TCG_TYPE_TL,
-                                  TCG_AREG0, offsetof(CPUState, t1), "T1");
-    cpu_T[2] = tcg_global_mem_new(TCG_TYPE_TL,
-                                  TCG_AREG0, offsetof(CPUState, t2), "T2");
-#else
-    cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0");
-    cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
-    cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
-#endif
-
-    /* register helpers */
-#undef DEF_HELPER
-#define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name);
-#include "helper.h"
-
     done_init = 1;
 }
 
-static inline void tcg_gen_helper_0_i(void *func, TCGv arg)
-{
-    TCGv tmp = tcg_const_i32(arg);
-
-    tcg_gen_helper_0_1(func, tmp);
-    tcg_temp_free(tmp);
-}
-
-
 #if defined(OPTIMIZE_FPRF_UPDATE)
 static uint16_t *gen_fprf_buf[OPC_BUF_SIZE];
 static uint16_t **gen_fprf_ptr;
@@ -265,16 +237,12 @@ static always_inline void gen_optimize_fprf (void)
 
 static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip)
 {
-    TCGv tmp;
 #if defined(TARGET_PPC64)
     if (ctx->sf_mode)
-        tmp = tcg_const_i64(nip);
+        gen_op_update_nip_64(nip >> 32, nip);
     else
 #endif
-        tmp = tcg_const_i32((uint32_t)nip);
+        gen_op_update_nip(nip);
-
-    tcg_gen_st_tl(tmp, cpu_env, offsetof(CPUState, nip));
-    tcg_temp_free(tmp);
 }
 
 #define GEN_EXCP(ctx, excp, error)                                            \
@@ -1325,7 +1293,7 @@ GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER)
         gen_op_load_gpr_T1(rB(ctx->opcode));
         gen_op_xor();
     } else {
-        tcg_gen_movi_tl(cpu_T[0], 0);
+        gen_op_reset_T0();
     }
     gen_op_store_T0_gpr(rA(ctx->opcode));
     if (unlikely(Rc(ctx->opcode) != 0))
@@ -1396,10 +1364,10 @@ GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_POPCNTB)
     gen_op_load_gpr_T0(rS(ctx->opcode));
 #if defined(TARGET_PPC64)
     if (ctx->sf_mode)
-        tcg_gen_helper_1_1(do_popcntb_64, cpu_T[0], cpu_T[0]);
+        gen_op_popcntb_64();
     else
 #endif
-        tcg_gen_helper_1_1(do_popcntb, cpu_T[0], cpu_T[0]);
+        gen_op_popcntb();
     gen_op_store_T0_gpr(rA(ctx->opcode));
 }
 
@@ -2120,7 +2088,7 @@ static always_inline void gen_addr_imm_index (DisasContext *ctx,
             gen_op_addi(simm);
     }
 #ifdef DEBUG_MEMORY_ACCESSES
-    tcg_gen_helper_0_0(do_print_mem_EA);
+    gen_op_print_mem_EA();
 #endif
 }
 
@@ -2134,19 +2102,19 @@ static always_inline void gen_addr_reg_index (DisasContext *ctx)
         gen_op_add();
     }
 #ifdef DEBUG_MEMORY_ACCESSES
-    tcg_gen_helper_0_0(do_print_mem_EA);
+    gen_op_print_mem_EA();
 #endif
 }
 
 static always_inline void gen_addr_register (DisasContext *ctx)
 {
     if (rA(ctx->opcode) == 0) {
-        tcg_gen_movi_tl(cpu_T[0], 0);
+        gen_op_reset_T0();
     } else {
         gen_op_load_gpr_T0(rA(ctx->opcode));
     }
 #ifdef DEBUG_MEMORY_ACCESSES
-    tcg_gen_helper_0_0(do_print_mem_EA);
+    gen_op_print_mem_EA();
 #endif
 }
 
@@ -3245,10 +3213,10 @@ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC)
         crm = CRM(ctx->opcode);
         if (likely((crm ^ (crm - 1)) == 0)) {
             crn = ffs(crm);
-            tcg_gen_ld8u_tl(cpu_T[0], cpu_env, offsetof(CPUState, crf[7 - crn]));
+            gen_op_load_cro(7 - crn);
         }
     } else {
-        tcg_gen_helper_1_0(do_load_cr, cpu_T[0]);
+        gen_op_load_cr();
     }
     gen_op_store_T0_gpr(rD(ctx->opcode));
 }
@@ -3263,7 +3231,7 @@ GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC)
         GEN_EXCP_PRIVREG(ctx);
         return;
     }
-    tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUState, msr));
+    gen_op_load_msr();
     gen_op_store_T0_gpr(rD(ctx->opcode));
 #endif
 }
@@ -3347,10 +3315,10 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC)
     if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) {
         crn = ffs(crm);
         gen_op_srli_T0(crn * 4);
-        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0xF);
+        gen_op_andi_T0(0xF);
-        tcg_gen_st8_tl(cpu_T[0], cpu_env, offsetof(CPUState, crf[7 - crn]));
+        gen_op_store_cro(7 - crn);
     } else {
-        tcg_gen_helper_0_i(do_store_cr, crm);
+        gen_op_store_cr(crm);
     }
 }
 
@@ -3375,7 +3343,7 @@ GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B)
          *      directly from ppc_store_msr
          */
         gen_update_nip(ctx, ctx->nip);
-        tcg_gen_helper_0_1(do_store_msr, cpu_T[0]);
+        gen_op_store_msr();
         /* Must stop the translation as machine state (may have) changed */
         /* Note that mtmsr is not always defined as context-synchronizing */
         ctx->exception = POWERPC_EXCP_STOP;
@@ -3405,10 +3373,10 @@ GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC)
         gen_update_nip(ctx, ctx->nip);
 #if defined(TARGET_PPC64)
         if (!ctx->sf_mode)
-            tcg_gen_helper_0_1(do_store_msr_32, cpu_T[0]);
+            gen_op_store_msr_32();
         else
 #endif
-            tcg_gen_helper_0_1(do_store_msr, cpu_T[0]);
+            gen_op_store_msr();
         /* Must stop the translation as machine state (may have) changed */
         /* Note that mtmsrd is not always defined as context-synchronizing */
         ctx->exception = POWERPC_EXCP_STOP;