hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate
To Save and Restore ICC_SRE_EL1 register introduce vmstate subsection and load only if non-zero. Also initialize icc_sre_el1 with to 0x7 in pre_load function. Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@cavium.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 1487850673-26455-3-git-send-email-vijay.kilari@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -70,6 +70,38 @@ static const VMStateDescription vmstate_gicv3_cpu_virt = {
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}
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};
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static int icc_sre_el1_reg_pre_load(void *opaque)
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{
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GICv3CPUState *cs = opaque;
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/*
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* If the sre_el1 subsection is not transferred this
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* means SRE_EL1 is 0x7 (which might not be the same as
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* our reset value).
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*/
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cs->icc_sre_el1 = 0x7;
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return 0;
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}
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static bool icc_sre_el1_reg_needed(void *opaque)
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{
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GICv3CPUState *cs = opaque;
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return cs->icc_sre_el1 != 7;
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}
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const VMStateDescription vmstate_gicv3_cpu_sre_el1 = {
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.name = "arm_gicv3_cpu/sre_el1",
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.version_id = 1,
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.minimum_version_id = 1,
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.pre_load = icc_sre_el1_reg_pre_load,
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.needed = icc_sre_el1_reg_needed,
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.fields = (VMStateField[]) {
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VMSTATE_UINT64(icc_sre_el1, GICv3CPUState),
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VMSTATE_END_OF_LIST()
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}
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};
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static const VMStateDescription vmstate_gicv3_cpu = {
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.name = "arm_gicv3_cpu",
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.version_id = 1,
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@ -100,6 +132,10 @@ static const VMStateDescription vmstate_gicv3_cpu = {
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.subsections = (const VMStateDescription * []) {
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&vmstate_gicv3_cpu_virt,
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NULL
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},
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.subsections = (const VMStateDescription * []) {
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&vmstate_gicv3_cpu_sre_el1,
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NULL
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}
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};
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@ -172,6 +172,7 @@ struct GICv3CPUState {
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uint8_t gicr_ipriorityr[GIC_INTERNAL];
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/* CPU interface */
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uint64_t icc_sre_el1;
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uint64_t icc_ctlr_el1[2];
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uint64_t icc_pmr_el1;
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uint64_t icc_bpr[3];
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