net: cadence_gem: Set ISR according to queue in use
Set ISR according to queue in use, added interrupt support for all queues. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
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@ -451,6 +451,16 @@ static inline void rx_desc_set_sar(uint32_t *desc, int sar_idx)
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/* The broadcast MAC address: 0xFFFFFFFFFFFF */
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static const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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static void gem_set_isr(CadenceGEMState *s, int q, uint32_t flag)
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{
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if (q == 0) {
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s->regs[GEM_ISR] |= flag & ~(s->regs[GEM_IMR]);
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} else {
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s->regs[GEM_INT_Q1_STATUS + q - 1] |= flag &
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~(s->regs[GEM_INT_Q1_MASK + q - 1]);
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}
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}
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/*
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* gem_init_register_masks:
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* One time initialization.
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@ -906,7 +916,7 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q)
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if (rx_desc_get_ownership(s->rx_desc[q]) == 1) {
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DB_PRINT("descriptor 0x%" HWADDR_PRIx " owned by sw.\n", desc_addr);
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s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_NOBUF;
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s->regs[GEM_ISR] |= GEM_INT_RXUSED & ~(s->regs[GEM_IMR]);
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gem_set_isr(s, q, GEM_INT_RXUSED);
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/* Handle interrupt consequences */
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gem_update_int_status(s);
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}
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@ -1080,7 +1090,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
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gem_receive_updatestats(s, buf, size);
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s->regs[GEM_RXSTATUS] |= GEM_RXSTATUS_FRMRCVD;
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s->regs[GEM_ISR] |= GEM_INT_RXCMPL & ~(s->regs[GEM_IMR]);
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gem_set_isr(s, q, GEM_INT_RXCMPL);
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/* Handle interrupt consequences */
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gem_update_int_status(s);
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@ -1231,13 +1241,7 @@ static void gem_transmit(CadenceGEMState *s)
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DB_PRINT("TX descriptor next: 0x%08x\n", s->tx_desc_addr[q]);
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s->regs[GEM_TXSTATUS] |= GEM_TXSTATUS_TXCMPL;
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s->regs[GEM_ISR] |= GEM_INT_TXCMPL & ~(s->regs[GEM_IMR]);
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/* Update queue interrupt status */
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if (s->num_priority_queues > 1) {
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s->regs[GEM_INT_Q1_STATUS + q] |=
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GEM_INT_TXCMPL & ~(s->regs[GEM_INT_Q1_MASK + q]);
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}
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gem_set_isr(s, q, GEM_INT_TXCMPL);
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/* Handle interrupt consequences */
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gem_update_int_status(s);
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@ -1287,7 +1291,10 @@ static void gem_transmit(CadenceGEMState *s)
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if (tx_desc_get_used(desc)) {
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s->regs[GEM_TXSTATUS] |= GEM_TXSTATUS_USED;
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s->regs[GEM_ISR] |= GEM_INT_TXUSED & ~(s->regs[GEM_IMR]);
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/* IRQ TXUSED is defined only for queue 0 */
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if (q == 0) {
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gem_set_isr(s, 0, GEM_INT_TXUSED);
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}
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gem_update_int_status(s);
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}
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}
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