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trivial patches for 2016-01-11 

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Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2016-01-11' into staging

trivial patches for 2016-01-11

# gpg: Signature made Mon 11 Jan 2016 08:39:32 GMT using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"

* remotes/mjt/tags/pull-trivial-patches-2016-01-11:
  hw/s390x: Remove superfluous return statements
  hw/core/qdev: Remove superfluous return statement
  hw/acpi: Remove superfluous return statement
  hw/ide: Remove superfluous return statements
  osdep.h: Include glib-compat.h in osdep.h rather than qemu-common.h
  scripts/checkpatch.pl: Don't allow special cases of unspaced operators
  PCI Bonito: QOMify and cleanup
  SH PCI Host: convert to realize()
  gt64120: convert to realize()
  Add missing syscall nrs. according to more recent Linux kernels
  hw/misc/edu: Convert to realize()
  configure: fix trace backend check
  xen/Makefile.objs: simplify
  crypto: Fix typo in example
  MAINTAINERS: Add the correct device_tree.h file
  iscsi: fix readcapacity error message
  net: convert qemu_log to error_report, fix message
  linux-user: enable sigaltstack for all architectures
  unicore32: convert get_sp_from_cpustate from macro to inline

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
stable-2.6
Peter Maydell 2016-01-11 12:56:58 +00:00
parent cc06ca4c97 fe02fc5209
commit 692a5519ab
24 changed files with 71 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
MAINTAINERS
View File

@ -1036,7 +1036,8 @@ Device Tree
M: Peter Crosthwaite <crosthwaite.peter@gmail.com>
M: Alexander Graf <agraf@suse.de>
S: Maintained
F: device_tree.[ch]
F: device_tree.c
F: include/sysemu/device_tree.h
Error reporting
M: Markus Armbruster <armbru@redhat.com>

2
block/iscsi.c
View File

@ -1270,7 +1270,7 @@ static void iscsi_readcapacity_sync(IscsiLun *iscsilun, Error **errp)
&& retries-- > 0);
if (task == NULL || task->status != SCSI_STATUS_GOOD) {
error_setg(errp, "iSCSI: failed to send readcapacity10 command.");
error_setg(errp, "iSCSI: failed to send readcapacity10/16 command");
} else if (!iscsilun->block_size ||
iscsilun->block_size % BDRV_SECTOR_SIZE) {
error_setg(errp, "iSCSI: the target returned an invalid "

2
configure vendored
View File

@ -4817,7 +4817,7 @@ echo "libcap-ng support $cap_ng"
echo "vhost-net support $vhost_net"
echo "vhost-scsi support $vhost_scsi"
echo "Trace backends $trace_backends"
if test "$trace_backend" = "simple"; then
if have_backend "simple"; then
echo "Trace output file $trace_file-<pid>"
fi
if test "$spice" = "yes"; then

1
hw/acpi/memory_hotplug.c
View File

@ -250,7 +250,6 @@ void acpi_memory_plug_cb(ACPIREGS *ar, qemu_irq irq, MemHotplugState *mem_st,
/* do ACPI magic */
acpi_send_gpe_event(ar, irq, ACPI_MEMORY_HOTPLUG_STATUS);
}
return;
}
void acpi_memory_unplug_request_cb(ACPIREGS *ar, qemu_irq irq,

1
hw/core/qdev.c
View File

@ -1134,7 +1134,6 @@ post_realize_fail:
fail:
error_propagate(errp, local_err);
return;
}
static bool device_get_hotpluggable(Object *obj, Error **errp)

1
hw/ide/atapi.c
View File

@ -824,7 +824,6 @@ static void cmd_inquiry(IDEState *s, uint8_t *buf)
out:
buf[size_idx] = idx - preamble_len;
ide_atapi_cmd_reply(s, idx, max_len);
return;
}
static void cmd_get_configuration(IDEState *s, uint8_t *buf)

2
hw/ide/macio.c
View File

@ -292,8 +292,6 @@ done:
block_acct_done(blk_get_stats(s->blk), &s->acct);
}
io->dma_end(opaque);
return;
}
static void pmac_ide_transfer_cb(void *opaque, int ret)

6
hw/mips/gt64xxx_pci.c
View File

@ -1193,7 +1193,7 @@ static int gt64120_init(SysBusDevice *dev)
return 0;
}
static int gt64120_pci_init(PCIDevice *d)
static void gt64120_pci_realize(PCIDevice *d, Error **errp)
{
/* FIXME: Malta specific hw assumptions ahead */
pci_set_word(d->config + PCI_COMMAND, 0);
@ -1207,8 +1207,6 @@ static int gt64120_pci_init(PCIDevice *d)
pci_set_long(d->config + PCI_BASE_ADDRESS_4, 0x14000000);
pci_set_long(d->config + PCI_BASE_ADDRESS_5, 0x14000001);
pci_set_byte(d->config + 0x3d, 0x01);
return 0;
}
static void gt64120_pci_class_init(ObjectClass *klass, void *data)
@ -1216,7 +1214,7 @@ static void gt64120_pci_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
k->init = gt64120_pci_init;
k->realize = gt64120_pci_realize;
k->vendor_id = PCI_VENDOR_ID_MARVELL;
k->device_id = PCI_DEVICE_ID_MARVELL_GT6412X;
k->revision = 0x10;

6
hw/misc/edu.c
View File

@ -327,7 +327,7 @@ static void *edu_fact_thread(void *opaque)
return NULL;
}
static int pci_edu_init(PCIDevice *pdev)
static void pci_edu_realize(PCIDevice *pdev, Error **errp)
{
EduState *edu = DO_UPCAST(EduState, pdev, pdev);
uint8_t *pci_conf = pdev->config;
@ -344,8 +344,6 @@ static int pci_edu_init(PCIDevice *pdev)
memory_region_init_io(&edu->mmio, OBJECT(edu), &edu_mmio_ops, edu,
"edu-mmio", 1 << 20);
pci_register_bar(pdev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &edu->mmio);
return 0;
}
static void pci_edu_uninit(PCIDevice *pdev)
@ -385,7 +383,7 @@ static void edu_class_init(ObjectClass *class, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(class);
k->init = pci_edu_init;
k->realize = pci_edu_realize;
k->exit = pci_edu_uninit;
k->vendor_id = PCI_VENDOR_ID_QEMU;
k->device_id = 0x11e8;

27
hw/pci-host/bonito.c
View File

@ -180,8 +180,6 @@
#define PCI_ADDR(busno,devno,funno,regno) \
((((busno)<<16)&0xff0000) + (((devno)<<11)&0xf800) + (((funno)<<8)&0x700) + (regno))
#define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost"
typedef struct BonitoState BonitoState;
typedef struct PCIBonitoState
@ -215,16 +213,19 @@ typedef struct PCIBonitoState
} PCIBonitoState;
struct BonitoState {
PCIHostState parent_obj;
qemu_irq *pic;
PCIBonitoState *pci_dev;
};
#define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost"
#define BONITO_PCI_HOST_BRIDGE(obj) \
OBJECT_CHECK(BonitoState, (obj), TYPE_BONITO_PCI_HOST_BRIDGE)
struct BonitoState {
PCIHostState parent_obj;
qemu_irq *pic;
PCIBonitoState *pci_dev;
};
#define TYPE_PCI_BONITO "Bonito"
#define PCI_BONITO(obj) \
OBJECT_CHECK(PCIBonitoState, (obj), TYPE_PCI_BONITO)
static void bonito_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
@ -723,7 +724,7 @@ static int bonito_pcihost_initfn(SysBusDevice *dev)
static void bonito_realize(PCIDevice *dev, Error **errp)
{
PCIBonitoState *s = DO_UPCAST(PCIBonitoState, dev, dev);
PCIBonitoState *s = PCI_BONITO(dev);
SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
@ -799,8 +800,8 @@ PCIBus *bonito_init(qemu_irq *pic)
qdev_init_nofail(dev);
/* set the pcihost pointer before bonito_initfn is called */
d = pci_create(phb->bus, PCI_DEVFN(0, 0), "Bonito");
s = DO_UPCAST(PCIBonitoState, dev, d);
d = pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO);
s = PCI_BONITO(d);
s->pcihost = pcihost;
pcihost->pci_dev = s;
qdev_init_nofail(DEVICE(d));
@ -828,7 +829,7 @@ static void bonito_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo bonito_info = {
.name = "Bonito",
.name = TYPE_PCI_BONITO,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIBonitoState),
.class_init = bonito_class_init,

1
hw/s390x/css.c
View File

@ -1430,7 +1430,6 @@ void subch_device_save(SubchDev *s, QEMUFile *f)
}
qemu_put_byte(f, s->ccw_fmt_1);
qemu_put_byte(f, s->ccw_no_data_cnt);
return;
}
int subch_device_load(SubchDev *s, QEMUFile *f)

4
hw/s390x/s390-pci-bus.c
View File

@ -123,7 +123,6 @@ void s390_pci_sclp_configure(int configure, SCCB *sccb)
}
psccb->header.response_code = cpu_to_be16(rc);
return;
}
static uint32_t s390_pci_get_pfid(PCIDevice *pdev)
@ -439,8 +438,6 @@ static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
io_int_word = (pbdev->isc << 27) | IO_INT_WORD_AI;
s390_io_interrupt(0, 0, 0, io_int_word);
}
return;
}
static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
@ -561,7 +558,6 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED,
pbdev->fh, pbdev->fid);
}
return;
}
static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,

5
hw/sh4/sh_pci.c
View File

@ -151,12 +151,11 @@ static int sh_pci_device_init(SysBusDevice *dev)
return 0;
}
static int sh_pci_host_init(PCIDevice *d)
static void sh_pci_host_realize(PCIDevice *d, Error **errp)
{
pci_set_word(d->config + PCI_COMMAND, PCI_COMMAND_WAIT);
pci_set_word(d->config + PCI_STATUS, PCI_STATUS_CAP_LIST |
PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM);
return 0;
}
static void sh_pci_host_class_init(ObjectClass *klass, void *data)
@ -164,7 +163,7 @@ static void sh_pci_host_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
k->init = sh_pci_host_init;
k->realize = sh_pci_host_realize;
k->vendor_id = PCI_VENDOR_ID_HITACHI;
k->device_id = PCI_DEVICE_ID_HITACHI_SH7751R;
/*

3
hw/xen/Makefile.objs
View File

@ -2,5 +2,4 @@
common-obj-$(CONFIG_XEN_BACKEND) += xen_backend.o xen_devconfig.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o xen_pt_graphics.o
obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_graphics.o xen_pt_msi.o

2
include/crypto/tlssession.h
View File

@ -56,7 +56,7 @@
*
* static int mysock_run_tls(int sockfd,
* QCryptoTLSCreds *creds,
* Error *erp)
* Error *errp)
* {
* QCryptoTLSSession *sess;
*

1
include/qemu-common.h
View File

@ -22,7 +22,6 @@
#define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)
#include "glib-compat.h"
#include "qemu/option.h"
#include "qemu/host-utils.h"

2
include/qemu/osdep.h
View File

@ -69,6 +69,8 @@
#include "sysemu/os-posix.h"
#endif
#include "glib-compat.h"
#include "qapi/error.h"
#if defined(CONFIG_SOLARIS) && CONFIG_SOLARIS_VERSION < 10

13
linux-user/aarch64/syscall_nr.h
View File

@ -262,6 +262,19 @@
#define TARGET_NR_process_vm_writev 271
#define TARGET_NR_kcmp 272
#define TARGET_NR_finit_module 273
#define TARGET_NR_sched_setattr 274
#define TARGET_NR_sched_getattr 275
#define TARGET_NR_renameat2 276
#define TARGET_NR_seccomp 277
#define TARGET_NR_getrandom 278
#define TARGET_NR_memfd_create 279
#define TARGET_NR_bpf 280
#define TARGET_NR_execveat 281
#define TARGET_NR_userfaultfd 282
#define TARGET_NR_membarrier 283
#define TARGET_NR_mlock2 284
#define TARGET_NR_open 1024
#define TARGET_NR_link 1025
#define TARGET_NR_unlink 1026

12
linux-user/arm/syscall_nr.h
View File

@ -384,3 +384,15 @@
#define TARGET_NR_process_vm_writev (377)
#define TARGET_NR_kcmp (378)
#define TARGET_NR_finit_module (379)
#define TARGET_NR_sched_setattr (380)
#define TARGET_NR_sched_getattr (381)
#define TARGET_NR_renameat2 (382)
#define TARGET_NR_seccomp (383)
#define TARGET_NR_getrandom (384)
#define TARGET_NR_memfd_create (385)
#define TARGET_NR_bpf (386)
#define TARGET_NR_execveat (387)
#define TARGET_NR_userfaultfd (388)
#define TARGET_NR_membarrier (389)
#define TARGET_NR_mlock2 (390)

12
linux-user/mips/syscall_nr.h
View File

@ -351,3 +351,15 @@
#define TARGET_NR_process_vm_writev (TARGET_NR_Linux + 346)
#define TARGET_NR_kcmp (TARGET_NR_Linux + 347)
#define TARGET_NR_finit_module (TARGET_NR_Linux + 348)
#define TARGET_NR_sched_setattr (TARGET_NR_Linux + 349)
#define TARGET_NR_sched_getattr (TARGET_NR_Linux + 350)
#define TARGET_NR_renameat2 (TARGET_NR_Linux + 351)
#define TARGET_NR_seccomp (TARGET_NR_Linux + 352)
#define TARGET_NR_getrandom (TARGET_NR_Linux + 353)
#define TARGET_NR_memfd_create (TARGET_NR_Linux + 354)
#define TARGET_NR_bpf (TARGET_NR_Linux + 355)
#define TARGET_NR_execveat (TARGET_NR_Linux + 356)
#define TARGET_NR_userfaultfd (TARGET_NR_Linux + 357)
#define TARGET_NR_membarrier (TARGET_NR_Linux + 358)
#define TARGET_NR_mlock2 (TARGET_NR_Linux + 359)

6
linux-user/syscall.c
View File

@ -8292,14 +8292,8 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
break;
}
case TARGET_NR_sigaltstack:
#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_MIPS) || \
defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_ALPHA) || \
defined(TARGET_M68K) || defined(TARGET_S390X) || defined(TARGET_OPENRISC)
ret = do_sigaltstack(arg1, arg2, get_sp_from_cpustate((CPUArchState *)cpu_env));
break;
#else
goto unimplemented;
#endif
#ifdef CONFIG_SENDFILE
case TARGET_NR_sendfile:

6
linux-user/unicore32/target_signal.h
View File

@ -21,6 +21,10 @@ typedef struct target_sigaltstack {
#define TARGET_SS_ONSTACK 1
#define TARGET_SS_DISABLE 2
#define get_sp_from_cpustate(cpustate) (cpustate->regs[29])
static inline abi_ulong get_sp_from_cpustate(CPUUniCore32State *state)
{
return state->regs[29];
}
#endif /* TARGET_SIGNAL_H */

2
net/dump.c
View File

@ -84,7 +84,7 @@ static ssize_t dump_receive_iov(DumpState *s, const struct iovec *iov, int cnt)
cnt = iov_copy(&dumpiov[1], cnt, iov, cnt, 0, caplen);
if (writev(s->fd, dumpiov, cnt + 1) != sizeof(hdr) + caplen) {
qemu_log("-net dump write error - stop dump\n");
error_report("network dump write error - stopping dump");
close(s->fd);
s->fd = -1;
}

13
scripts/checkpatch.pl
View File

@ -1890,19 +1890,6 @@ sub process {
ERROR("space prohibited after that '$op' $at\n" . $hereptr);
}
# << and >> may either have or not have spaces both sides
} elsif ($op eq '<<' or $op eq '>>' or
$op eq '&' or $op eq '^' or $op eq '|' or
$op eq '+' or $op eq '-' or
$op eq '*' or $op eq '/' or
$op eq '%')
{
if ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
ERROR("need consistent spacing around '$op' $at\n" .
$hereptr);
}
# A colon needs no spaces before when it is
# terminating a case value or a label.
} elsif ($opv eq ':C' || $opv eq ':L') {