i.MX: Add GPIO devices to i.MX25 SOC
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 2eb129ba8713aedfe877eaa3d8de80061d880fbb.1441828793.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -63,6 +63,11 @@ static void fsl_imx25_init(Object *obj)
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object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
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object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
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qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
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qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
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}
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}
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for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
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object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
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qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
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}
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}
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}
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static void fsl_imx25_realize(DeviceState *dev, Error **errp)
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static void fsl_imx25_realize(DeviceState *dev, Error **errp)
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@ -214,6 +219,30 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
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i2c_table[i].irq));
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i2c_table[i].irq));
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}
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}
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/* Initialize all GPIOs */
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for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
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static const struct {
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hwaddr addr;
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unsigned int irq;
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} gpio_table[FSL_IMX25_NUM_GPIOS] = {
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{ FSL_IMX25_GPIO1_ADDR, FSL_IMX25_GPIO1_IRQ },
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{ FSL_IMX25_GPIO2_ADDR, FSL_IMX25_GPIO2_IRQ },
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{ FSL_IMX25_GPIO3_ADDR, FSL_IMX25_GPIO3_IRQ },
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{ FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }
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};
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object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
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/* Connect GPIO IRQ to PIC */
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->avic),
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gpio_table[i].irq));
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}
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/* initialize 2 x 16 KB ROM */
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/* initialize 2 x 16 KB ROM */
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memory_region_init_rom_device(&s->rom[0], NULL, NULL, NULL,
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memory_region_init_rom_device(&s->rom[0], NULL, NULL, NULL,
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"imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
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"imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
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@ -25,6 +25,7 @@
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#include "hw/timer/imx_epit.h"
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#include "hw/timer/imx_epit.h"
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#include "hw/net/imx_fec.h"
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#include "hw/net/imx_fec.h"
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#include "hw/i2c/imx_i2c.h"
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#include "hw/i2c/imx_i2c.h"
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#include "hw/gpio/imx_gpio.h"
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#include "exec/memory.h"
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#include "exec/memory.h"
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#define TYPE_FSL_IMX25 "fsl,imx25"
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#define TYPE_FSL_IMX25 "fsl,imx25"
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@ -34,6 +35,7 @@
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#define FSL_IMX25_NUM_GPTS 4
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#define FSL_IMX25_NUM_GPTS 4
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#define FSL_IMX25_NUM_EPITS 2
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#define FSL_IMX25_NUM_EPITS 2
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#define FSL_IMX25_NUM_I2CS 3
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#define FSL_IMX25_NUM_I2CS 3
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#define FSL_IMX25_NUM_GPIOS 4
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typedef struct FslIMX25State {
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typedef struct FslIMX25State {
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/*< private >*/
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/*< private >*/
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@ -48,6 +50,7 @@ typedef struct FslIMX25State {
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IMXEPITState epit[FSL_IMX25_NUM_EPITS];
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IMXEPITState epit[FSL_IMX25_NUM_EPITS];
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IMXFECState fec;
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IMXFECState fec;
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IMXI2CState i2c[FSL_IMX25_NUM_I2CS];
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IMXI2CState i2c[FSL_IMX25_NUM_I2CS];
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IMXGPIOState gpio[FSL_IMX25_NUM_GPIOS];
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MemoryRegion rom[2];
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MemoryRegion rom[2];
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MemoryRegion iram;
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MemoryRegion iram;
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MemoryRegion iram_alias;
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MemoryRegion iram_alias;
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@ -204,6 +207,14 @@ typedef struct FslIMX25State {
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#define FSL_IMX25_EPIT1_SIZE 0x4000
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#define FSL_IMX25_EPIT1_SIZE 0x4000
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#define FSL_IMX25_EPIT2_ADDR 0x53F98000
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#define FSL_IMX25_EPIT2_ADDR 0x53F98000
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#define FSL_IMX25_EPIT2_SIZE 0x4000
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#define FSL_IMX25_EPIT2_SIZE 0x4000
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#define FSL_IMX25_GPIO4_ADDR 0x53F9C000
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#define FSL_IMX25_GPIO4_SIZE 0x4000
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#define FSL_IMX25_GPIO3_ADDR 0x53FA4000
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#define FSL_IMX25_GPIO3_SIZE 0x4000
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#define FSL_IMX25_GPIO1_ADDR 0x53FCC000
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#define FSL_IMX25_GPIO1_SIZE 0x4000
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#define FSL_IMX25_GPIO2_ADDR 0x53FD0000
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#define FSL_IMX25_GPIO2_SIZE 0x4000
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#define FSL_IMX25_AVIC_ADDR 0x68000000
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#define FSL_IMX25_AVIC_ADDR 0x68000000
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#define FSL_IMX25_AVIC_SIZE 0x4000
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#define FSL_IMX25_AVIC_SIZE 0x4000
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#define FSL_IMX25_IRAM_ADDR 0x78000000
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#define FSL_IMX25_IRAM_ADDR 0x78000000
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@ -230,5 +241,9 @@ typedef struct FslIMX25State {
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#define FSL_IMX25_I2C1_IRQ 3
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#define FSL_IMX25_I2C1_IRQ 3
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#define FSL_IMX25_I2C2_IRQ 4
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#define FSL_IMX25_I2C2_IRQ 4
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#define FSL_IMX25_I2C3_IRQ 10
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#define FSL_IMX25_I2C3_IRQ 10
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#define FSL_IMX25_GPIO1_IRQ 52
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#define FSL_IMX25_GPIO2_IRQ 51
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#define FSL_IMX25_GPIO3_IRQ 16
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#define FSL_IMX25_GPIO4_IRQ 23
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#endif /* FSL_IMX25_H */
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#endif /* FSL_IMX25_H */
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