mc146818rtc: port rtc to vmstate
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
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048c74c437
commit
6b075b8af6
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@ -501,68 +501,47 @@ static void rtc_set_date_from_host(RTCState *s)
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rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
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rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
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}
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}
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static void rtc_save(QEMUFile *f, void *opaque)
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static int rtc_post_load(void *opaque, int version_id)
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{
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{
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#ifdef TARGET_I386
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RTCState *s = opaque;
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RTCState *s = opaque;
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qemu_put_buffer(f, s->cmos_data, 128);
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qemu_put_8s(f, &s->cmos_index);
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qemu_put_be32(f, s->current_tm.tm_sec);
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qemu_put_be32(f, s->current_tm.tm_min);
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qemu_put_be32(f, s->current_tm.tm_hour);
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qemu_put_be32(f, s->current_tm.tm_wday);
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qemu_put_be32(f, s->current_tm.tm_mday);
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qemu_put_be32(f, s->current_tm.tm_mon);
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qemu_put_be32(f, s->current_tm.tm_year);
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qemu_put_timer(f, s->periodic_timer);
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qemu_put_be64(f, s->next_periodic_time);
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qemu_put_be64(f, s->next_second_time);
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qemu_put_timer(f, s->second_timer);
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qemu_put_timer(f, s->second_timer2);
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qemu_put_be32(f, s->irq_coalesced);
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qemu_put_be32(f, s->period);
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}
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static int rtc_load(QEMUFile *f, void *opaque, int version_id)
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{
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RTCState *s = opaque;
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if (version_id < 1 || version_id > 2)
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return -EINVAL;
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qemu_get_buffer(f, s->cmos_data, 128);
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qemu_get_8s(f, &s->cmos_index);
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s->current_tm.tm_sec=qemu_get_be32(f);
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s->current_tm.tm_min=qemu_get_be32(f);
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s->current_tm.tm_hour=qemu_get_be32(f);
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s->current_tm.tm_wday=qemu_get_be32(f);
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s->current_tm.tm_mday=qemu_get_be32(f);
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s->current_tm.tm_mon=qemu_get_be32(f);
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s->current_tm.tm_year=qemu_get_be32(f);
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qemu_get_timer(f, s->periodic_timer);
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s->next_periodic_time=qemu_get_be64(f);
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s->next_second_time=qemu_get_be64(f);
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qemu_get_timer(f, s->second_timer);
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qemu_get_timer(f, s->second_timer2);
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if (version_id >= 2) {
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if (version_id >= 2) {
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s->irq_coalesced = qemu_get_be32(f);
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s->period = qemu_get_be32(f);
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#ifdef TARGET_I386
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if (rtc_td_hack) {
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if (rtc_td_hack) {
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rtc_coalesced_timer_update(s);
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rtc_coalesced_timer_update(s);
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}
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}
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#endif
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}
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}
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#endif
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return 0;
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return 0;
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}
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}
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static const VMStateDescription vmstate_rtc = {
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.name = "mc146818rtc",
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.version_id = 2,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.post_load = rtc_post_load,
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.fields = (VMStateField []) {
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VMSTATE_BUFFER(cmos_data, RTCState),
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VMSTATE_UINT8(cmos_index, RTCState),
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VMSTATE_INT32(current_tm.tm_sec, RTCState),
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VMSTATE_INT32(current_tm.tm_min, RTCState),
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VMSTATE_INT32(current_tm.tm_hour, RTCState),
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VMSTATE_INT32(current_tm.tm_wday, RTCState),
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VMSTATE_INT32(current_tm.tm_mday, RTCState),
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VMSTATE_INT32(current_tm.tm_mon, RTCState),
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VMSTATE_INT32(current_tm.tm_year, RTCState),
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VMSTATE_TIMER(periodic_timer, RTCState),
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VMSTATE_INT64(next_periodic_time, RTCState),
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VMSTATE_INT64(next_second_time, RTCState),
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VMSTATE_TIMER(second_timer, RTCState),
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VMSTATE_TIMER(second_timer2, RTCState),
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VMSTATE_UINT32_V(irq_coalesced, RTCState, 2),
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VMSTATE_UINT32_V(period, RTCState, 2),
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VMSTATE_END_OF_LIST()
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}
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};
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static void rtc_reset(void *opaque)
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static void rtc_reset(void *opaque)
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{
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{
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RTCState *s = opaque;
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RTCState *s = opaque;
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@ -609,7 +588,7 @@ static int rtc_initfn(ISADevice *dev)
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register_ioport_write(base, 2, 1, cmos_ioport_write, s);
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register_ioport_write(base, 2, 1, cmos_ioport_write, s);
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register_ioport_read(base, 2, 1, cmos_ioport_read, s);
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register_ioport_read(base, 2, 1, cmos_ioport_read, s);
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register_savevm("mc146818rtc", base, 2, rtc_save, rtc_load, s);
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vmstate_register(base, &vmstate_rtc, s);
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qemu_register_reset(rtc_reset, s);
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qemu_register_reset(rtc_reset, s);
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return 0;
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return 0;
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}
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}
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@ -741,7 +720,7 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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io_memory = cpu_register_io_memory(rtc_mm_read, rtc_mm_write, s);
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io_memory = cpu_register_io_memory(rtc_mm_read, rtc_mm_write, s);
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cpu_register_physical_memory(base, 2 << it_shift, io_memory);
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cpu_register_physical_memory(base, 2 << it_shift, io_memory);
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register_savevm("mc146818rtc", base, 2, rtc_save, rtc_load, s);
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vmstate_register(base, &vmstate_rtc, s);
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qemu_register_reset(rtc_reset, s);
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qemu_register_reset(rtc_reset, s);
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return s;
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return s;
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}
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}
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